zd1211rw: Fixed incorrect constant name.

Trial and error reveals that CR_ZD1211B_TX_PWR_CTL* do not affect the
transmission power.  Instead these registers seem to control the contention
windows limits for different QoS access categories.

Signed-off-by: Javier Cardona <javier@cozybit.com>
Signed-off-by: Daniel Drake <dsd@gentoo.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

diff --git a/drivers/net/wireless/zd1211rw/zd_chip.c b/drivers/net/wireless/zd1211rw/zd_chip.c
index e3fba6f09455ea8b6d156535c45e66597d78b1f1..db96adf90ae2f30609d9fb5d7cea91a04f1caf8d 100644 (file)
--- a/drivers/net/wireless/zd1211rw/zd_chip.c
+++ b/drivers/net/wireless/zd1211rw/zd_chip.c
@@ -771,10 +771,10 @@ static int zd1211b_hw_init_hmac(struct zd_chip *chip)
 {
        static const struct zd_ioreq32 ioreqs[] = {
                { CR_ZD1211B_RETRY_MAX,         0x02020202 },
-               { CR_ZD1211B_TX_PWR_CTL4,       0x007f003f },
-               { CR_ZD1211B_TX_PWR_CTL3,       0x007f003f },
-               { CR_ZD1211B_TX_PWR_CTL2,       0x003f001f },
-               { CR_ZD1211B_TX_PWR_CTL1,       0x001f000f },
+               { CR_ZD1211B_CWIN_MAX_MIN_AC0,  0x007f003f },
+               { CR_ZD1211B_CWIN_MAX_MIN_AC1,  0x007f003f },
+               { CR_ZD1211B_CWIN_MAX_MIN_AC2,  0x003f001f },
+               { CR_ZD1211B_CWIN_MAX_MIN_AC3,  0x001f000f },
                { CR_ZD1211B_AIFS_CTL1,         0x00280028 },
                { CR_ZD1211B_AIFS_CTL2,         0x008C003C },
                { CR_ZD1211B_TXOP,              0x01800824 },

diff --git a/drivers/net/wireless/zd1211rw/zd_chip.h b/drivers/net/wireless/zd1211rw/zd_chip.h
index 009c03777a3543ef369ff889dda72b5867498971..5b6e3a3751ba2bee359d0f0a14a1e1f8af0a0170 100644 (file)
--- a/drivers/net/wireless/zd1211rw/zd_chip.h
+++ b/drivers/net/wireless/zd1211rw/zd_chip.h
@@ -625,11 +625,10 @@ enum {
 #define CR_S_MD                                CTL_REG(0x0830)
 
 #define CR_USB_DEBUG_PORT              CTL_REG(0x0888)
-
-#define CR_ZD1211B_TX_PWR_CTL1         CTL_REG(0x0b00)
-#define CR_ZD1211B_TX_PWR_CTL2         CTL_REG(0x0b04)
-#define CR_ZD1211B_TX_PWR_CTL3         CTL_REG(0x0b08)
-#define CR_ZD1211B_TX_PWR_CTL4         CTL_REG(0x0b0c)
+#define CR_ZD1211B_CWIN_MAX_MIN_AC0    CTL_REG(0x0b00)
+#define CR_ZD1211B_CWIN_MAX_MIN_AC1    CTL_REG(0x0b04)
+#define CR_ZD1211B_CWIN_MAX_MIN_AC2    CTL_REG(0x0b08)
+#define CR_ZD1211B_CWIN_MAX_MIN_AC3    CTL_REG(0x0b0c)
 #define CR_ZD1211B_AIFS_CTL1           CTL_REG(0x0b10)
 #define CR_ZD1211B_AIFS_CTL2           CTL_REG(0x0b14)
 #define CR_ZD1211B_TXOP                        CTL_REG(0x0b20)