* published by the Free Software Foundation.
*/
+#include <asm/io.h>
+
#include "prcm-common.h"
#ifndef __ASSEMBLER__
{
return __raw_readl(addr);
}
+
+/* Read-modify-write bits in a CM register */
+static u32 __attribute__((unused)) cm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *va)
+{
+ u32 v;
+
+ v = cm_read_reg(va);
+ v &= ~mask;
+ v |= bits;
+ cm_write_reg(v, va);
+
+ return v;
+}
+
#endif
/*
#define CM_CLKSEL2 0x0044
#define CM_CLKSTCTRL 0x0048
-
/* Architecture-specific registers */
#define OMAP24XX_CM_FCLKEN2 0x0004
{
return cm_read_reg(OMAP_CM_REGADDR(module, idx));
}
+
+/* Read-modify-write bits in a CM register (by domain) */
+static inline u32 __attribute__((unused)) cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx)
+{
+ return cm_rmw_reg_bits(mask, bits, OMAP_CM_REGADDR(module, idx));
+}
+
+static inline u32 __attribute__((unused)) cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx)
+{
+ return cm_rmw_mod_reg_bits(bits, bits, module, idx);
+}
+
+static inline u32 __attribute__((unused)) cm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx)
+{
+ return cm_rmw_mod_reg_bits(bits, 0x0, module, idx);
+}
+
#endif
/* CM register bits shared between 24XX and 3430 */
/*
* OMAP2/3 Power/Reset Management (PRM) register definitions
*
- * Copyright (C) 2007 Texas Instruments, Inc.
- * Copyright (C) 2007 Nokia Corporation
+ * Copyright (C) 2007-2008 Texas Instruments, Inc.
+ * Copyright (C) 2007-2008 Nokia Corporation
*
* Written by Paul Walmsley
*
* published by the Free Software Foundation.
*/
+#include <asm/io.h>
+#include <asm/bitops.h>
+
#include "prcm-common.h"
#ifndef __ASSEMBLER__
#define OMAP3430_PRM_IRQSTATUS_MPU OMAP_PRM_REGADDR(OCP_MOD, 0x0018)
#define OMAP3430_PRM_IRQENABLE_MPU OMAP_PRM_REGADDR(OCP_MOD, 0x001c)
-
#define OMAP3430_PRM_VC_SMPS_SA OMAP_PRM_REGADDR(OMAP3430_GR_MOD, 0x0020)
#define OMAP3430_PRM_VC_SMPS_VOL_RA OMAP_PRM_REGADDR(OMAP3430_GR_MOD, 0x0024)
#define OMAP3430_PRM_VC_SMPS_CMD_RA OMAP_PRM_REGADDR(OMAP3430_GR_MOD, 0x0028)
return __raw_readl(addr);
}
+/* Read-modify-write bits in a PRM register */
+static u32 __attribute__((unused)) prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *va)
+{
+ u32 v;
+
+ v = prm_read_reg(va);
+ v &= ~mask;
+ v |= bits;
+ prm_write_reg(v, va);
+
+ return v;
+}
+
#endif
/*
#define OMAP3430_PRM_IRQSTATUS_IVA2 0x00f8
#define OMAP3430_PRM_IRQENABLE_IVA2 0x00fc
+/* Read-modify-write bits in a PRM register (by domain) */
+static u32 __attribute__((unused)) prm_rmw_mod_reg_bits(u32 mask, u32 bits,
+ s16 module, s16 idx)
+{
+ return prm_rmw_reg_bits(mask, bits, OMAP_PRM_REGADDR(module, idx));
+}
+
+static u32 __attribute__((unused)) prm_set_mod_reg_bits(u32 bits, s16 module, s16 idx)
+{
+ return prm_rmw_mod_reg_bits(bits, bits, module, idx);
+}
+
+static u32 __attribute__((unused)) prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx)
+{
+ return prm_rmw_mod_reg_bits(bits, 0x0, module, idx);
+}
/* Architecture-specific registers */