]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
[ARM] S3C64XX: Add VIC0 and VIC1 sourced interripts
authorBen Dooks <ben-linux@fluff.org>
Tue, 21 Oct 2008 13:06:51 +0000 (14:06 +0100)
committerBen Dooks <ben-linux@fluff.org>
Mon, 15 Dec 2008 21:51:22 +0000 (21:51 +0000)
Add and initialise the two VIC (PL192) found on
the S3C64XX series CPUs.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
arch/arm/mach-s3c6410/cpu.c
arch/arm/plat-s3c/include/plat/cpu.h
arch/arm/plat-s3c64xx/Kconfig
arch/arm/plat-s3c64xx/Makefile
arch/arm/plat-s3c64xx/include/plat/irqs.h
arch/arm/plat-s3c64xx/include/plat/s3c6410.h
arch/arm/plat-s3c64xx/irq.c [new file with mode: 0644]

index fbca763fa486bf23695ba799cbfa9c1c2ae84707..c3e317c1650276a760d5fdcc3d5422b400a74b21 100644 (file)
@@ -58,6 +58,12 @@ void __init s3c6410_init_clocks(int xtal)
        s3c24xx_register_baseclocks(xtal);
 }
 
+void __init s3c6410_init_irq(void)
+{
+       /* VIC0 is missing IRQ7, VIC1 is fully populated. */
+       s3c64xx_init_irq(~0 & ~(1 << 7), ~0);
+}
+
 struct sysdev_class s3c6410_sysclass = {
        .name   = "s3c6410-core",
 };
index 011157ea871abaf39e7a2c69ff7cebc76c68dfa6..6d89a4637f3006497859db73e221aa8089597785 100644 (file)
@@ -44,6 +44,7 @@ extern void s3c_init_cpu(unsigned long idcode,
 /* core initialisation functions */
 
 extern void s3c24xx_init_irq(void);
+extern void s3c64xx_init_irq(u32 vic0, u32 vic1);
 
 extern void s3c24xx_init_io(struct map_desc *mach_desc, int size);
 
index 756c166051bf19ab22ca1e6717a0b8388b802d0f..14d6343b54e802d2d8adfc94083abba8ded53794 100644 (file)
@@ -10,6 +10,7 @@ config PLAT_S3C64XX
        bool
        depends on ARCH_S3C64XX
        select PLAT_S3C
+       select ARM_VIC
        default y
        select NO_IOPORT
        select ARCH_REQUIRE_GPIOLIB
index 5d9a1d86ab8ec519b0f20c6b3e6a3ba00d6f9ae6..9be8ed59977fdbdbc27838e980632621d8e3049e 100644 (file)
@@ -14,3 +14,4 @@ obj-                          :=
 
 obj-y                          += dev-uart.o
 obj-y                          += cpu.o
+obj-y                          += irq.o
index 0092b5cba4a20f4434ba78e1ef2dc80065a03f42..3564dfbec85a5da5f9348557e14de60e31a34698 100644 (file)
@@ -24,6 +24,9 @@
 
 #define S3C_IRQ(x)     ((x) + S3C_IRQ_OFFSET)
 
+#define S3C_VIC0_BASE  S3C_IRQ(0)
+#define S3C_VIC1_BASE  S3C_IRQ(32)
+
 /* UART interrupts, each UART has 4 intterupts per channel so
  * use the space between the ISA and S3C main interrupts. Note, these
  * are not in the same order as the S3C24XX series! */
index 56f14b5d454bd9135689e5b03ac821f1c171ab3a..50dcdd6f680060ce888c4260e0af72dbbf340da2 100644 (file)
@@ -15,6 +15,7 @@
 #ifdef CONFIG_CPU_S3C6410
 
 extern  int s3c6410_init(void);
+extern void s3c6410_init_irq(void);
 extern void s3c6410_map_io(void);
 extern void s3c6410_init_clocks(int xtal);
 
diff --git a/arch/arm/plat-s3c64xx/irq.c b/arch/arm/plat-s3c64xx/irq.c
new file mode 100644 (file)
index 0000000..308dc41
--- /dev/null
@@ -0,0 +1,34 @@
+/* arch/arm/plat-s3c64xx/irq.c
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C64XX - Interrupt handling
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+
+#include <asm/hardware/vic.h>
+#include <asm/irq.h>
+
+#include <mach/map.h>
+#include <plat/cpu.h>
+
+void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
+{
+       printk(KERN_INFO "%s: initialising interrupts\n", __func__);
+
+       /* initialise the pair of VICs */
+       vic_init(S3C_VA_VIC0, S3C_VIC0_BASE, vic0_valid);
+       vic_init(S3C_VA_VIC1, S3C_VIC1_BASE, vic1_valid);
+}
+
+