[ARM] 4843/1: Add GCR_CLKBPB for PXA3xx

The PXA3xx AC97 controller has an additional control bit GCR_CLKBPB
which must be used during cold reset.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index ac175b4d10cbfa859880be062163be2526eaab4c..2357a73340d4200c39743268fe930826d341a601 100644 (file)
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -520,6 +520,9 @@
 #define MCCR_FSRIE     (1 << 1)        /* FIFO Service Request Interrupt Enable */
 
 #define GCR            __REG(0x4050000C)  /* Global Control Register */
+#ifdef CONFIG_PXA3xx
+#define GCR_CLKBPB     (1 << 31)       /* Internal clock enable */
+#endif
 #define GCR_nDMAEN     (1 << 24)       /* non DMA Enable */
 #define GCR_CDONE_IE   (1 << 19)       /* Command Done Interrupt Enable */
 #define GCR_SDONE_IE   (1 << 18)       /* Status Done Interrupt Enable */