if (omap2_select_table_rate(&virt_prcm_set, mpurate))
printk(KERN_ERR "Could not find matching MPU rate\n");
- propagate_rate(&osc_ck); /* update main root fast */
- propagate_rate(&func_32k_ck); /* update main root slow */
+ recalculate_root_clocks();
printk(KERN_INFO "Switched to new clocking rate (Crystal/DPLL/MPU): "
"%ld.%01ld/%ld/%ld MHz\n",
}
curr_prcm_set = prcm;
- propagate_rate(&osc_ck); /* update main root fast */
- propagate_rate(&func_32k_ck); /* update main root slow */
+ recalculate_root_clocks();
printk(KERN_INFO "Clocking rate (Crystal/DPLL/MPU): "
"%ld.%01ld/%ld/%ld MHz\n",
.name = "func_32k_ck",
.rate = 32000,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
- RATE_FIXED | ALWAYS_ENABLED,
+ RATE_FIXED | ALWAYS_ENABLED | RATE_PROPAGATES,
+ .recalc = &propagate_rate,
};
/* Typical 12/13MHz in standalone mode, will be 26Mhz in chassis mode */
.rate = 26000000, /* fixed up in clock init */
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
RATE_FIXED | RATE_PROPAGATES,
+ .recalc = &propagate_rate,
};
/* With out modem likely 12MHz, with modem likely 13MHz */
}
}
+/**
+ * recalculate_root_clocks - recalculate and propagate all root clocks
+ *
+ * Recalculates all root clocks (clocks with no parent), which if the
+ * clock's .recalc is set correctly, should also propagate their rates.
+ * Called at init.
+ */
+void recalculate_root_clocks(void)
+{
+ struct clk *clkp;
+
+ list_for_each_entry(clkp, &clocks, node) {
+ if (unlikely(!clkp->parent) && likely((u32)clkp->recalc))
+ clkp->recalc(clkp);
+ }
+}
+
int clk_register(struct clk *clk)
{
if (clk == NULL || IS_ERR(clk))
extern int clk_register(struct clk *clk);
extern void clk_unregister(struct clk *clk);
extern void propagate_rate(struct clk *clk);
+extern void recalculate_root_clocks(void);
extern void followparent_recalc(struct clk * clk);
extern void clk_allow_idle(struct clk *clk);
extern void clk_deny_idle(struct clk *clk);