]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
[ARM] 4721/1: S3C24XX: Ensure watchdog clock is enbaled for hard reset
authorBen Dooks <ben-linux@fluff.org>
Sun, 23 Dec 2007 02:09:31 +0000 (03:09 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Mon, 28 Jan 2008 13:20:48 +0000 (13:20 +0000)
If the hard reset routine is using the watchdog, then
ensure that the clock for the watchdog has been enabled
before we try and issue a reset.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
include/asm-arm/arch-s3c2410/system.h

index 63891786dfa03aa867ca804e13e2b86ea9490b29..cb9cd9fb86110a666882bafe448e8f750f3f57a0 100644 (file)
@@ -20,6 +20,9 @@
 #include <asm/plat-s3c/regs-watchdog.h>
 #include <asm/arch/regs-clock.h>
 
+#include <linux/clk.h>
+#include <linux/err.h>
+
 void (*s3c24xx_idle)(void);
 void (*s3c24xx_reset_hook)(void);
 
@@ -59,6 +62,8 @@ static void arch_idle(void)
 static void
 arch_reset(char mode)
 {
+       struct clk *wdtclk;
+
        if (mode == 's') {
                cpu_reset(0);
        }
@@ -70,6 +75,12 @@ arch_reset(char mode)
 
        __raw_writel(0, S3C2410_WTCON);   /* disable watchdog, to be safe  */
 
+       wdtclk = clk_get(NULL, "watchdog");
+       if (!IS_ERR(wdtclk)) {
+               clk_enable(wdtclk);
+       } else
+               printk(KERN_WARNING "%s: warning: cannot get watchdog clock\n", __func__);
+
        /* put initial values into count and data */
        __raw_writel(0x100, S3C2410_WTCNT);
        __raw_writel(0x100, S3C2410_WTDAT);