]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
[BNX2]: Download 5709 firmware.
authorMichael Chan <mchan@broadcom.com>
Sun, 19 Nov 2006 22:14:35 +0000 (14:14 -0800)
committerDavid S. Miller <davem@sunset.davemloft.net>
Sun, 3 Dec 2006 05:24:32 +0000 (21:24 -0800)
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/bnx2.c

index 52fe620e1a4c11e8d528310ae72deefdd9955087..92897efbc26341817c41ff00bf8806e826d4f064 100644 (file)
@@ -53,6 +53,7 @@
 
 #include "bnx2.h"
 #include "bnx2_fw.h"
+#include "bnx2_fw2.h"
 
 #define DRV_MODULE_NAME                "bnx2"
 #define PFX DRV_MODULE_NAME    ": "
@@ -2410,7 +2411,10 @@ bnx2_init_cpus(struct bnx2 *bp)
        cpu_reg.spad_base = BNX2_RXP_SCRATCH;
        cpu_reg.mips_view_base = 0x8000000;
 
-       fw = &bnx2_rxp_fw_06;
+       if (CHIP_NUM(bp) == CHIP_NUM_5709)
+               fw = &bnx2_rxp_fw_09;
+       else
+               fw = &bnx2_rxp_fw_06;
 
        rc = load_cpu_fw(bp, &cpu_reg, fw);
        if (rc)
@@ -2430,7 +2434,10 @@ bnx2_init_cpus(struct bnx2 *bp)
        cpu_reg.spad_base = BNX2_TXP_SCRATCH;
        cpu_reg.mips_view_base = 0x8000000;
 
-       fw = &bnx2_txp_fw_06;
+       if (CHIP_NUM(bp) == CHIP_NUM_5709)
+               fw = &bnx2_txp_fw_09;
+       else
+               fw = &bnx2_txp_fw_06;
 
        rc = load_cpu_fw(bp, &cpu_reg, fw);
        if (rc)
@@ -2450,7 +2457,10 @@ bnx2_init_cpus(struct bnx2 *bp)
        cpu_reg.spad_base = BNX2_TPAT_SCRATCH;
        cpu_reg.mips_view_base = 0x8000000;
 
-       fw = &bnx2_tpat_fw_06;
+       if (CHIP_NUM(bp) == CHIP_NUM_5709)
+               fw = &bnx2_tpat_fw_09;
+       else
+               fw = &bnx2_tpat_fw_06;
 
        rc = load_cpu_fw(bp, &cpu_reg, fw);
        if (rc)
@@ -2470,12 +2480,36 @@ bnx2_init_cpus(struct bnx2 *bp)
        cpu_reg.spad_base = BNX2_COM_SCRATCH;
        cpu_reg.mips_view_base = 0x8000000;
 
-       fw = &bnx2_com_fw_06;
+       if (CHIP_NUM(bp) == CHIP_NUM_5709)
+               fw = &bnx2_com_fw_09;
+       else
+               fw = &bnx2_com_fw_06;
 
        rc = load_cpu_fw(bp, &cpu_reg, fw);
        if (rc)
                goto init_cpu_err;
 
+       /* Initialize the Command Processor. */
+       cpu_reg.mode = BNX2_CP_CPU_MODE;
+       cpu_reg.mode_value_halt = BNX2_CP_CPU_MODE_SOFT_HALT;
+       cpu_reg.mode_value_sstep = BNX2_CP_CPU_MODE_STEP_ENA;
+       cpu_reg.state = BNX2_CP_CPU_STATE;
+       cpu_reg.state_value_clear = 0xffffff;
+       cpu_reg.gpr0 = BNX2_CP_CPU_REG_FILE;
+       cpu_reg.evmask = BNX2_CP_CPU_EVENT_MASK;
+       cpu_reg.pc = BNX2_CP_CPU_PROGRAM_COUNTER;
+       cpu_reg.inst = BNX2_CP_CPU_INSTRUCTION;
+       cpu_reg.bp = BNX2_CP_CPU_HW_BREAKPOINT;
+       cpu_reg.spad_base = BNX2_CP_SCRATCH;
+       cpu_reg.mips_view_base = 0x8000000;
+
+       if (CHIP_NUM(bp) == CHIP_NUM_5709) {
+               fw = &bnx2_cp_fw_09;
+
+               load_cpu_fw(bp, &cpu_reg, fw);
+               if (rc)
+                       goto init_cpu_err;
+       }
 init_cpu_err:
        bnx2_gunzip_end(bp);
        return rc;