]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
[POWERPC] Cell fixup DMA offset for new southbridge
authorBenjamin Herrenschmidt <benh@kernel.crashing.org>
Sat, 11 Nov 2006 06:25:09 +0000 (17:25 +1100)
committerPaul Mackerras <paulus@samba.org>
Mon, 4 Dec 2006 09:38:50 +0000 (20:38 +1100)
This patch makes the Cell DMA code work on both the Spider and the Axon
south bridges by turning cell_dma_valid into a variable instead of a
constant. This is a temporary patch until we have full iommu support.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
arch/powerpc/platforms/cell/iommu.c
arch/powerpc/platforms/cell/iommu.h

index 0e6ab8a55ef77727757f72c51a526bea7235a9e8..e3ea5311476ed99925436b0ad4afd6e2db0d2848 100644 (file)
@@ -46,6 +46,8 @@
 
 #include "iommu.h"
 
+static dma_addr_t cell_dma_valid = SPIDER_DMA_VALID;
+
 static inline unsigned long 
 get_iopt_entry(unsigned long real_address, unsigned long ioid,
                         unsigned long prot)
@@ -423,7 +425,7 @@ static void *cell_alloc_coherent(struct device *hwdev, size_t size,
        ret = (void *)__get_free_pages(flag, get_order(size));
        if (ret != NULL) {
                memset(ret, 0, size);
-               *dma_handle = virt_to_abs(ret) | CELL_DMA_VALID;
+               *dma_handle = virt_to_abs(ret) | cell_dma_valid;
        }
        return ret;
 }
@@ -437,7 +439,7 @@ static void cell_free_coherent(struct device *hwdev, size_t size,
 static dma_addr_t cell_map_single(struct device *hwdev, void *ptr,
                size_t size, enum dma_data_direction direction)
 {
-       return virt_to_abs(ptr) | CELL_DMA_VALID;
+       return virt_to_abs(ptr) | cell_dma_valid;
 }
 
 static void cell_unmap_single(struct device *hwdev, dma_addr_t dma_addr,
@@ -452,7 +454,7 @@ static int cell_map_sg(struct device *hwdev, struct scatterlist *sg,
 
        for (i = 0; i < nents; i++, sg++) {
                sg->dma_address = (page_to_phys(sg->page) + sg->offset)
-                                       | CELL_DMA_VALID;
+                                       | cell_dma_valid;
                sg->dma_length = sg->length;
        }
 
@@ -483,6 +485,12 @@ void cell_init_iommu(void)
 {
        int setup_bus = 0;
 
+       /* If we have an Axon bridge, clear the DMA valid mask. This is fairly
+        * hackish but will work well enough until we have proper iommu code.
+        */
+       if (of_find_node_by_name(NULL, "axon"))
+               cell_dma_valid = 0;
+
        if (of_find_node_by_path("/mambo")) {
                pr_info("Not using iommu on systemsim\n");
        } else {
index 490d77abfe852804c7309c6185cf25b4b2f304a2..2a9ab95604a935f4e5c61d60933417e49b12c093 100644 (file)
@@ -53,9 +53,11 @@ enum {
        IOC_ST_ORIGIN     = 0x918,
        IOC_CONF          = 0x930,
 
-       /* The high bit needs to be set on every DMA address,
-          only 2GB are addressable */
-       CELL_DMA_VALID    = 0x80000000,
+       /* The high bit needs to be set on every DMA address when using
+        * a spider bridge and only 2GB are addressable with the current
+        * iommu code.
+        */
+       SPIDER_DMA_VALID  = 0x80000000,
        CELL_DMA_MASK     = 0x7fffffff,
 };