ieee1394: ohci1394: flush MMIO writes before delay in initialization

and replace busy-wait by msleep.

Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>

diff --git a/drivers/ieee1394/ohci1394.c b/drivers/ieee1394/ohci1394.c
index d077fe6d0ce5a962d52fe14e4192622400d50528..498539ecd6737272ffdb2bfa8140cc99815110ae 100644 (file)
--- a/drivers/ieee1394/ohci1394.c
+++ b/drivers/ieee1394/ohci1394.c
@@ -3199,15 +3199,16 @@ static int __devinit ohci1394_pci_probe(struct pci_dev *dev,
        /* Now enable LPS, which we need in order to start accessing
         * most of the registers.  In fact, on some cards (ALI M5251),
         * accessing registers in the SClk domain without LPS enabled
-        * will lock up the machine.  Wait 50msec to make sure we have
-        * full link enabled.  */
+        * will lock up the machine. */
        reg_write(ohci, OHCI1394_HCControlSet, OHCI1394_HCControl_LPS);
 
        /* Disable and clear interrupts */
        reg_write(ohci, OHCI1394_IntEventClear, 0xffffffff);
        reg_write(ohci, OHCI1394_IntMaskClear, 0xffffffff);
 
-       mdelay(50);
+       /* Flush MMIO writes and wait to make sure we have full link enabled. */
+       reg_read(ohci, OHCI1394_Version);
+       msleep(50);
 
        /* Determine the number of available IR and IT contexts. */
        ohci->nb_iso_rcv_ctx =
@@ -3422,7 +3423,8 @@ static int ohci1394_pci_resume(struct pci_dev *dev)
        reg_write(ohci, OHCI1394_HCControlSet, OHCI1394_HCControl_LPS);
        reg_write(ohci, OHCI1394_IntEventClear, 0xffffffff);
        reg_write(ohci, OHCI1394_IntMaskClear, 0xffffffff);
-       mdelay(50);
+       reg_read(ohci, OHCI1394_Version);
+       msleep(50);
 
        err = request_irq(dev->irq, ohci_irq_handler, IRQF_SHARED,
                          OHCI1394_DRIVER_NAME, ohci);