]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
[MIPS] tlbex.c: use __cacheline_aligned instead of __tlb_handler_align
authorFranck Bui-Huu <fbuihuu@gmail.com>
Thu, 18 Oct 2007 07:11:16 +0000 (09:11 +0200)
committerRalf Baechle <ralf@linux-mips.org>
Tue, 29 Jan 2008 10:14:57 +0000 (10:14 +0000)
Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/mm/tlbex.c

index 325bc730ab5e1a6ea13ed3f6f90403af6a0efc0c..21bcf084882f1e71e8fdca14635cb9c54007627c 100644 (file)
@@ -1391,18 +1391,15 @@ static void __init build_r4000_tlb_refill_handler(void)
 extern void tlb_do_page_fault_0(void);
 extern void tlb_do_page_fault_1(void);
 
-#define __tlb_handler_align \
-       __attribute__((__aligned__(1 << CONFIG_MIPS_L1_CACHE_SHIFT)))
-
 /*
  * 128 instructions for the fastpath handler is generous and should
  * never be exceeded.
  */
 #define FASTPATH_SIZE 128
 
-u32 __tlb_handler_align handle_tlbl[FASTPATH_SIZE];
-u32 __tlb_handler_align handle_tlbs[FASTPATH_SIZE];
-u32 __tlb_handler_align handle_tlbm[FASTPATH_SIZE];
+u32 handle_tlbl[FASTPATH_SIZE] __cacheline_aligned;
+u32 handle_tlbs[FASTPATH_SIZE] __cacheline_aligned;
+u32 handle_tlbm[FASTPATH_SIZE] __cacheline_aligned;
 
 static void __init
 iPTE_LW(u32 **p, struct label **l, unsigned int pte, unsigned int ptr)