]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
cxgb3 - Fix direct XAUI support
authorDivy Le Ray <divy@chelsio.com>
Wed, 30 May 2007 17:01:39 +0000 (10:01 -0700)
committerJeff Garzik <jeff@garzik.org>
Wed, 20 Jun 2007 23:16:58 +0000 (19:16 -0400)
Check all lanes for link status on direct XAUI cards.
Don't assume that direct XAUI always uses XGMAC 1.

Signed-off-by: Divy Le Ray <divy@chelsio.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
drivers/net/cxgb3/ael1002.c
drivers/net/cxgb3/regs.h

index 73a41e6a5bfc8fbf0fd7803a38d6b7612b963dc9..ee140e63ddc5e337a3b2e22ce8c7a128395b1fd6 100644 (file)
@@ -219,7 +219,13 @@ static int xaui_direct_get_link_status(struct cphy *phy, int *link_ok,
                unsigned int status;
 
                status = t3_read_reg(phy->adapter,
-                                    XGM_REG(A_XGM_SERDES_STAT0, phy->addr));
+                                    XGM_REG(A_XGM_SERDES_STAT0, phy->addr)) |
+                   t3_read_reg(phy->adapter,
+                               XGM_REG(A_XGM_SERDES_STAT1, phy->addr)) |
+                   t3_read_reg(phy->adapter,
+                               XGM_REG(A_XGM_SERDES_STAT2, phy->addr)) |
+                   t3_read_reg(phy->adapter,
+                               XGM_REG(A_XGM_SERDES_STAT3, phy->addr));
                *link_ok = !(status & F_LOWSIG0);
        }
        if (speed)
@@ -247,5 +253,5 @@ static struct cphy_ops xaui_direct_ops = {
 void t3_xaui_direct_phy_prep(struct cphy *phy, struct adapter *adapter,
                             int phy_addr, const struct mdio_ops *mdio_ops)
 {
-       cphy_init(phy, adapter, 1, &xaui_direct_ops, mdio_ops);
+       cphy_init(phy, adapter, phy_addr, &xaui_direct_ops, mdio_ops);
 }
index e5a553410e24c6038668b688ce0498cbf0fb3f00..bf9d6be7f2147ca9a9fbbddc0bd9c4647900bb9c 100644 (file)
 #define F_RESETPLL01    V_RESETPLL01(1U)
 
 #define A_XGM_SERDES_STAT0 0x8f0
+#define A_XGM_SERDES_STAT1 0x8f4
+#define A_XGM_SERDES_STAT2 0x8f8
 
 #define S_LOWSIG0    0
 #define V_LOWSIG0(x) ((x) << S_LOWSIG0)