]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
ixgb: endianness
authorAl Viro <viro@zeniv.linux.org.uk>
Thu, 23 Aug 2007 04:47:03 +0000 (00:47 -0400)
committerDavid S. Miller <davem@sunset.davemloft.net>
Wed, 10 Oct 2007 23:52:01 +0000 (16:52 -0700)
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
drivers/net/ixgb/ixgb_ee.c
drivers/net/ixgb/ixgb_ee.h
drivers/net/ixgb/ixgb_ethtool.c
drivers/net/ixgb/ixgb_hw.h

index 52c99d01d5681f33c9c51242e887c52240debe5b..e8eb0fd6c5766fdc1429ffb050a11408f243c5d6 100644 (file)
@@ -411,7 +411,7 @@ ixgb_write_eeprom(struct ixgb_hw *hw, uint16_t offset, uint16_t data)
        ixgb_cleanup_eeprom(hw);
 
        /* clear the init_ctrl_reg_1 to signify that the cache is invalidated */
-       ee_map->init_ctrl_reg_1 = le16_to_cpu(EEPROM_ICW1_SIGNATURE_CLEAR);
+       ee_map->init_ctrl_reg_1 = cpu_to_le16(EEPROM_ICW1_SIGNATURE_CLEAR);
 
        return;
 }
@@ -476,19 +476,19 @@ ixgb_get_eeprom_data(struct ixgb_hw *hw)
                uint16_t ee_data;
                ee_data = ixgb_read_eeprom(hw, i);
                checksum += ee_data;
-               hw->eeprom[i] = le16_to_cpu(ee_data);
+               hw->eeprom[i] = cpu_to_le16(ee_data);
        }
 
        if (checksum != (uint16_t) EEPROM_SUM) {
                DEBUGOUT("ixgb_ee: Checksum invalid.\n");
                /* clear the init_ctrl_reg_1 to signify that the cache is
                 * invalidated */
-               ee_map->init_ctrl_reg_1 = le16_to_cpu(EEPROM_ICW1_SIGNATURE_CLEAR);
+               ee_map->init_ctrl_reg_1 = cpu_to_le16(EEPROM_ICW1_SIGNATURE_CLEAR);
                return (FALSE);
        }
 
-       if ((ee_map->init_ctrl_reg_1 & le16_to_cpu(EEPROM_ICW1_SIGNATURE_MASK))
-                != le16_to_cpu(EEPROM_ICW1_SIGNATURE_VALID)) {
+       if ((ee_map->init_ctrl_reg_1 & cpu_to_le16(EEPROM_ICW1_SIGNATURE_MASK))
+                != cpu_to_le16(EEPROM_ICW1_SIGNATURE_VALID)) {
                DEBUGOUT("ixgb_ee: Signature invalid.\n");
                return(FALSE);
        }
@@ -511,8 +511,8 @@ ixgb_check_and_get_eeprom_data (struct ixgb_hw* hw)
 {
        struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
 
-       if ((ee_map->init_ctrl_reg_1 & le16_to_cpu(EEPROM_ICW1_SIGNATURE_MASK))
-           == le16_to_cpu(EEPROM_ICW1_SIGNATURE_VALID)) {
+       if ((ee_map->init_ctrl_reg_1 & cpu_to_le16(EEPROM_ICW1_SIGNATURE_MASK))
+           == cpu_to_le16(EEPROM_ICW1_SIGNATURE_VALID)) {
                return (TRUE);
        } else {
                return ixgb_get_eeprom_data(hw);
@@ -528,7 +528,7 @@ ixgb_check_and_get_eeprom_data (struct ixgb_hw* hw)
  * Returns:
  *          Word at indexed offset in eeprom, if valid, 0 otherwise.
  ******************************************************************************/
-uint16_t
+__le16
 ixgb_get_eeprom_word(struct ixgb_hw *hw, uint16_t index)
 {
 
index ef236b935c15559edb5cd9c69889fd73bef9eb70..7908bf3005ed53e121f56e696f01ec3a6917e7b8 100644 (file)
 /* EEPROM structure */
 struct ixgb_ee_map_type {
        uint8_t mac_addr[IXGB_ETH_LENGTH_OF_ADDRESS];
-       uint16_t compatibility;
-       uint16_t reserved1[4];
-       uint32_t pba_number;
-       uint16_t init_ctrl_reg_1;
-       uint16_t subsystem_id;
-       uint16_t subvendor_id;
-       uint16_t device_id;
-       uint16_t vendor_id;
-       uint16_t init_ctrl_reg_2;
-       uint16_t oem_reserved[16];
-       uint16_t swdpins_reg;
-       uint16_t circuit_ctrl_reg;
+       __le16 compatibility;
+       __le16 reserved1[4];
+       __le32 pba_number;
+       __le16 init_ctrl_reg_1;
+       __le16 subsystem_id;
+       __le16 subvendor_id;
+       __le16 device_id;
+       __le16 vendor_id;
+       __le16 init_ctrl_reg_2;
+       __le16 oem_reserved[16];
+       __le16 swdpins_reg;
+       __le16 circuit_ctrl_reg;
        uint8_t d3_power;
        uint8_t d0_power;
-       uint16_t reserved2[28];
-       uint16_t checksum;
+       __le16 reserved2[28];
+       __le16 checksum;
 };
 
 /* EEPROM Functions */
index ddad26bb5c58cdca77b6a02c75f82821b0c5f430..fddd5844168d69202d4c39748ae24ed282999f6e 100644 (file)
@@ -422,7 +422,7 @@ ixgb_get_eeprom(struct net_device *netdev,
 {
        struct ixgb_adapter *adapter = netdev_priv(netdev);
        struct ixgb_hw *hw = &adapter->hw;
-       uint16_t *eeprom_buff;
+       __le16 *eeprom_buff;
        int i, max_len, first_word, last_word;
        int ret_val = 0;
 
@@ -446,7 +446,7 @@ ixgb_get_eeprom(struct net_device *netdev,
        first_word = eeprom->offset >> 1;
        last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 
-       eeprom_buff = kmalloc(sizeof(uint16_t) *
+       eeprom_buff = kmalloc(sizeof(__le16) *
                        (last_word - first_word + 1), GFP_KERNEL);
        if(!eeprom_buff)
                return -ENOMEM;
index 40ef5ca88717d4f4d3f9bfa0e5606f3003d06803..af5643324ee3ee854da86e0110e969e3b9118c74 100644 (file)
@@ -711,7 +711,7 @@ struct ixgb_hw {
        uint32_t bar2;
        uint32_t bar3;
        uint16_t pci_cmd_word;  /* PCI command register id from PCI configuration space */
-       uint16_t eeprom[IXGB_EEPROM_SIZE];      /* EEPROM contents read at init time  */
+       __le16 eeprom[IXGB_EEPROM_SIZE];        /* EEPROM contents read at init time  */
        unsigned long io_base;  /* Our I/O mapped location */
        uint32_t lastLFC;
        uint32_t lastRFC;
@@ -809,7 +809,7 @@ void ixgb_get_ee_mac_addr(struct ixgb_hw *hw, uint8_t *mac_addr);
 uint32_t ixgb_get_ee_pba_number(struct ixgb_hw *hw);
 uint16_t ixgb_get_ee_device_id(struct ixgb_hw *hw);
 boolean_t ixgb_get_eeprom_data(struct ixgb_hw *hw);
-uint16_t ixgb_get_eeprom_word(struct ixgb_hw *hw, uint16_t index);
+__le16 ixgb_get_eeprom_word(struct ixgb_hw *hw, uint16_t index);
 
 /* Everything else */
 void ixgb_led_on(struct ixgb_hw *hw);