static void __init omap_generic_init_irq(void)
{
+ omap2_init_common_hw();
omap_init_irq();
}
static void __init omap_generic_map_io(void)
{
- omap_map_common_io();
+ omap2_map_common_io();
}
MACHINE_START(OMAP_GENERIC, "Generic OMAP24xx")
static void __init omap_h4_init_irq(void)
{
+ omap2_init_common_hw();
omap_init_irq();
omap_gpio_init();
h4_init_smc91x();
static void __init omap_h4_map_io(void)
{
- omap_map_common_io();
+ omap2_map_common_io();
}
MACHINE_START(OMAP_H4, "OMAP2420 H4 board")
#include <linux/kernel.h>
#include <linux/init.h>
-#include <asm/mach/map.h>
+#include <asm/tlb.h>
#include <asm/io.h>
+
+#include <asm/mach/map.h>
+
#include <asm/arch/mux.h>
extern void omap_sram_init(void);
}
};
-void __init omap_map_common_io(void)
+void __init omap2_map_common_io(void)
{
iotable_init(omap2_io_desc, ARRAY_SIZE(omap2_io_desc));
+
+ /* Normally devicemaps_init() would flush caches and tlb after
+ * mdesc->map_io(), but we must also do it here because of the CPU
+ * revision check below.
+ */
+ local_flush_tlb_all();
+ flush_cache_all();
+
omap2_check_revision();
omap_sram_init();
+}
+
+void __init omap2_init_common_hw(void)
+{
omap2_mux_init();
omap2_clk_init();
}
extern void omap1_map_common_io(void);
extern void omap1_init_common_hw(void);
+extern void omap2_map_common_io(void);
+extern void omap2_init_common_hw(void);
+
#else
#define __REG8(paddr) io_p2v(paddr)