while (c--) {
if (tx != NULL) {
while (!(__raw_readl(chstat_reg) & OMAP2_MCSPI_CHSTAT_TXS));
+#ifdef VERBOSE
+ dev_dbg(&spi->dev, "write-%d %02x\n",
+ word_len, *tx);
+#endif
__raw_writel(*tx, tx_reg);
}
if (rx != NULL) {
if (c == 0 && tx == NULL)
omap2_mcspi_set_enable(spi, 0);
*rx++ = __raw_readl(rx_reg);
+#ifdef VERBOSE
+ dev_dbg(&spi->dev, "read-%d %02x\n",
+ word_len, *(rx - 1));
+#endif
}
}
} else if (word_len <= 16) {
while (c--) {
if (tx != NULL) {
while (!(__raw_readl(chstat_reg) & OMAP2_MCSPI_CHSTAT_TXS));
+#ifdef VERBOSE
+ dev_dbg(&spi->dev, "write-%d %04x\n",
+ word_len, *tx);
+#endif
__raw_writel(*tx++, tx_reg);
}
if (rx != NULL) {
if (c == 0 && tx == NULL)
omap2_mcspi_set_enable(spi, 0);
*rx++ = __raw_readl(rx_reg);
+#ifdef VERBOSE
+ dev_dbg(&spi->dev, "read-%d %04x\n",
+ word_len, *(rx - 1));
+#endif
}
}
} else if (word_len <= 32) {
while (c--) {
if (tx != NULL) {
while (!(__raw_readl(chstat_reg) & OMAP2_MCSPI_CHSTAT_TXS));
+#ifdef VERBOSE
+ dev_dbg(&spi->dev, "write-%d %04x\n",
+ word_len, *tx);
+#endif
__raw_writel(*tx++, tx_reg);
}
if (rx != NULL) {
if (c == 0 && tx == NULL)
omap2_mcspi_set_enable(spi, 0);
*rx++ = __raw_readl(rx_reg);
+#ifdef VERBOSE
+ dev_dbg(&spi->dev, "read-%d %04x\n",
+ word_len, *(rx - 1));
+#endif
}
}
}
l |= OMAP2_MCSPI_CHCONF_PHA;
mcspi_write_cs_reg(spi, OMAP2_MCSPI_CHCONF0, l);
+ dev_dbg(&spi->dev, "setup: speed %d, sample %s edge, clk %s inverted\n",
+ OMAP2_MCSPI_MAX_FREQ / (1 << div),
+ (spi->mode & SPI_CPHA) ? "odd" : "even",
+ (spi->mode & SPI_CPOL) ? "" : "not");
+
return 0;
}