]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
[SCSI] qla2xxx: Correct staging of RISC while attempting to pause.
authorAndrew Vasquez <andrew.vasquez@qlogic.com>
Thu, 20 Sep 2007 21:07:38 +0000 (14:07 -0700)
committerJames Bottomley <jejb@mulgrave.localdomain>
Fri, 12 Oct 2007 18:49:54 +0000 (14:49 -0400)
There's no need to reset the RISC prior to pausing.

Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
drivers/scsi/qla2xxx/qla_dbg.c

index b52fa8977d91cbc16bff9524cf2f23dc181d3010..2defe0c21df4992ccd865518bb606210489bd8c9 100644 (file)
@@ -172,19 +172,16 @@ qla24xx_pause_risc(struct device_reg_24xx __iomem *reg)
        int rval = QLA_SUCCESS;
        uint32_t cnt;
 
-       if ((RD_REG_DWORD(&reg->hccr) & HCCRX_RISC_PAUSE) == 0) {
-               WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET |
-                   HCCRX_CLR_HOST_INT);
-               RD_REG_DWORD(&reg->hccr);               /* PCI Posting. */
-               WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_PAUSE);
-               for (cnt = 30000;
-                   (RD_REG_DWORD(&reg->hccr) & HCCRX_RISC_PAUSE) == 0 &&
-                   rval == QLA_SUCCESS; cnt--) {
-                       if (cnt)
-                               udelay(100);
-                       else
-                               rval = QLA_FUNCTION_TIMEOUT;
-               }
+       if (RD_REG_DWORD(&reg->hccr) & HCCRX_RISC_PAUSE)
+               return rval;
+
+       WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_PAUSE);
+       for (cnt = 30000; (RD_REG_DWORD(&reg->hccr) & HCCRX_RISC_PAUSE) == 0 &&
+           rval == QLA_SUCCESS; cnt--) {
+               if (cnt)
+                       udelay(100);
+               else
+                       rval = QLA_FUNCTION_TIMEOUT;
        }
 
        return rval;