[PATCH] sky2: receive queue watermark tweak

This patch makes the receive performance on some systems go from
714MB/s to 941MB/s. It adjusts the watermark of the receive queue
to be lower, thereby avoiding excess hardware flow control. This is
most important on the systems which have little/no additional buffering.

Signed-off-by: Stephen Hemminger <shemminger@osdl.org>
Signed-off-by: Jeff Garzik <jeff@garzik.org>

diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c
index b9f7eb5453f1ab456bb56f90c5ad79d03058e1b7..a8e096393a41445fd6c7d3b94a641d6efc137fbe 100644 (file)
--- a/drivers/net/sky2.c
+++ b/drivers/net/sky2.c
@@ -1062,11 +1062,16 @@ static int sky2_rx_start(struct sky2_port *sky2)
        sky2->rx_put = sky2->rx_next = 0;
        sky2_qset(hw, rxq);
 
+       /* On PCI express lowering the watermark gives better performance */
+       if (pci_find_capability(hw->pdev, PCI_CAP_ID_EXP))
+               sky2_write32(hw, Q_ADDR(rxq, Q_WM), BMU_WM_PEX);
+
+       /* These chips have no ram buffer?
+        * MAC Rx RAM Read is controlled by hardware */
        if (hw->chip_id == CHIP_ID_YUKON_EC_U &&
-           (hw->chip_rev == CHIP_REV_YU_EC_U_A1 || hw->chip_rev == CHIP_REV_YU_EC_U_B0)) {
-               /* MAC Rx RAM Read is controlled by hardware */
+           (hw->chip_rev == CHIP_REV_YU_EC_U_A1
+            || hw->chip_rev == CHIP_REV_YU_EC_U_B0))
                sky2_write32(hw, Q_ADDR(rxq, Q_F), F_M_RX_RAM_DIS);
-       }
 
        sky2_prefetch_init(hw, rxq, sky2->rx_le_map, RX_LE_SIZE - 1);
 

diff --git a/drivers/net/sky2.h b/drivers/net/sky2.h
index 7760545edbf2ae8a95f7e9611e6f752bf70e8952..a63f6057b2ea6effebaa1eeb26fa34f35272442d 100644 (file)
--- a/drivers/net/sky2.h
+++ b/drivers/net/sky2.h
@@ -680,6 +680,7 @@ enum {
                          BMU_FIFO_ENA | BMU_OP_ON,
 
        BMU_WM_DEFAULT = 0x600,
+       BMU_WM_PEX     = 0x80,
 };
 
 /* Tx BMU Control / Status Registers (Yukon-2) */