]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
[IA64] Force error to surface in nofault code
authorRuss Anderson <rja@sgi.com>
Thu, 14 Jun 2007 21:01:24 +0000 (16:01 -0500)
committerTony Luck <tony.luck@intel.com>
Tue, 26 Jun 2007 20:34:16 +0000 (13:34 -0700)
Montecito behaves slightly differently than previous processors,
resulting in the MCA due to a failed PIO read to sometimes surfacing
outside the nofault code.  Adding an additional or and stop bits
ensures the MCA surfaces in the nofault code.

Signed-off-by: Russ Anderson <rja@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
arch/ia64/sn/kernel/xp_nofault.S

index b772543053c96d98bdf45d2b23ec0a2a5bad2178..54e8973b6e99d21679c2083d76c8c0ea2cdfaedf 100644 (file)
@@ -21,7 +21,8 @@
 xp_nofault_PIOR:
        mov     r8=r0                   // Stage a success return value
        ld8.acq r9=[r32];;              // PIO Read the specified register
-       adds    r9=1,r9                 // Add to force a consume
+       adds    r9=1,r9;;               // Add to force consumption
+       or      r9=r9,r9;;              // Or to force consumption
        br.ret.sptk.many b0;;           // Return success
 
        .global xp_error_PIOR