]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
ARM: OMAP: 34xx specific check wether any fck is active before entering sleep
authorJouni Hogander <jouni.hogander@nokia.com>
Sat, 23 Aug 2008 23:11:49 +0000 (16:11 -0700)
committerTony Lindgren <tony@atomide.com>
Sat, 23 Aug 2008 23:12:20 +0000 (16:12 -0700)
We cannot enter sleep_while_idle if some functional clocks are
active. Add a check for enabled functional clocks for 34xx.

Note that this workaround could be behind CONFIG_PM_DEBUG
option when all drivers are configuring their sysconfig
registers properly and using their clocks properly.

Signed-off-by: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/mach-omap2/pm34xx.c

index a57cf4172a0c965eb6633fe33ac47d9bd78e88fc..a145f8072360547c9bd35fd10ae8cc254e6f0336 100644 (file)
@@ -174,10 +174,47 @@ static void omap_sram_idle(void)
        omap2_gpio_resume_after_retention();
 }
 
+/*
+ * Check if functional clocks are enabled before entering
+ * sleep. This function could be behind CONFIG_PM_DEBUG
+ * when all drivers are configuring their sysconfig registers
+ * properly and using their clocks properly.
+ */
+static int omap3_fclks_active(void)
+{
+       u32 fck_core1 = 0, fck_core3 = 0, fck_sgx = 0, fck_dss = 0,
+               fck_cam = 0, fck_per = 0, fck_usbhost = 0;
+
+       fck_core1 = cm_read_mod_reg(CORE_MOD,
+                                   CM_FCLKEN1);
+       if (is_sil_rev_greater_than(OMAP3430_REV_ES1_0)) {
+               fck_core3 = cm_read_mod_reg(CORE_MOD,
+                                           OMAP3430ES2_CM_FCLKEN3);
+               fck_sgx = cm_read_mod_reg(OMAP3430ES2_SGX_MOD,
+                                         CM_FCLKEN);
+               fck_usbhost = cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD,
+                                             CM_FCLKEN);
+       } else
+               fck_sgx = cm_read_mod_reg(GFX_MOD,
+                                         OMAP3430ES2_CM_FCLKEN3);
+       fck_dss = cm_read_mod_reg(OMAP3430_DSS_MOD,
+                                 CM_FCLKEN);
+       fck_cam = cm_read_mod_reg(OMAP3430_CAM_MOD,
+                                 CM_FCLKEN);
+       fck_per = cm_read_mod_reg(OMAP3430_PER_MOD,
+                                 CM_FCLKEN);
+       if (fck_core1 | fck_core3 | fck_sgx | fck_dss |
+           fck_cam | fck_per | fck_usbhost)
+               return 1;
+       return 0;
+}
+
 static int omap3_can_sleep(void)
 {
        if (!enable_dyn_sleep)
                return 0;
+       if (omap3_fclks_active())
+               return 0;
        if (atomic_read(&sleep_block) > 0)
                return 0;
        return 1;