[ARM] 4882/2: Correction for S3C2410 clkout generation

This is a correction for 2 small bugs for the Samsung S3C2410 ARM9 SoC
clocks generator

Signed-off-by: Davide Rizzo <davide@elpa.it>
Acked-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

diff --git a/arch/arm/plat-s3c24xx/clock.c b/arch/arm/plat-s3c24xx/clock.c
index d84167fb33b1fa69df54602a925ffc2f573ed008..3ac8d8d781b3837f4ec47653e2b1ce4b98d25dfe 100644 (file)
--- a/arch/arm/plat-s3c24xx/clock.c
+++ b/arch/arm/plat-s3c24xx/clock.c
@@ -411,7 +411,7 @@ static int s3c24xx_clkout_setparent(struct clk *clk, struct clk *parent)
 
        clk->parent = parent;
 
-       if (clk == &s3c24xx_dclk0)
+       if (clk == &s3c24xx_clkout0)
                mask = S3C2410_MISCCR_CLK0_MASK;
        else {
                source <<= 4;
@@ -437,7 +437,7 @@ struct clk s3c24xx_dclk0 = {
 struct clk s3c24xx_dclk1 = {
        .name           = "dclk1",
        .id             = -1,
-       .ctrlbit        = S3C2410_DCLKCON_DCLK0EN,
+       .ctrlbit        = S3C2410_DCLKCON_DCLK1EN,
        .enable         = s3c24xx_dclk_enable,
        .set_parent     = s3c24xx_dclk_setparent,
        .set_rate       = s3c24xx_set_dclk_rate,