Allow the L2X0 outer cache support to be configurable

By default, this option was selected by the platform Kconfig. This
patch adds "depends on" to L2X0 so that it can be enabled/disabled
manually.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

diff --git a/arch/arm/mach-realview/Kconfig b/arch/arm/mach-realview/Kconfig
index eba1a8ce7354f96bd7b3eddb31ce074b3d2a4cbf..5ccde7cf39e868ce129c4f4fc204903d1f72f6d8 100644 (file)
--- a/arch/arm/mach-realview/Kconfig
+++ b/arch/arm/mach-realview/Kconfig
@@ -10,7 +10,6 @@ config MACH_REALVIEW_EB
 config REALVIEW_EB_ARM11MP
        bool "Support ARM11MPCore tile"
        depends on MACH_REALVIEW_EB
-       select CACHE_L2X0
        help
          Enable support for the ARM11MPCore tile on the Realview platform.
 
@@ -27,7 +26,6 @@ config REALVIEW_EB_ARM11MP_REVB
 config MACH_REALVIEW_PB11MP
        bool "Support RealView/PB11MPCore platform"
        select ARM_GIC
-       select CACHE_L2X0
        help
          Include support for the ARM(R) RealView MPCore Platform Baseboard.
          PB11MPCore is a platform with an on-board ARM11MPCore and has
@@ -36,7 +34,6 @@ config MACH_REALVIEW_PB11MP
 config MACH_REALVIEW_PB1176
        bool "Support RealView/PB1176 platform"
        select ARM_GIC
-       select CACHE_L2X0
        help
          Include support for the ARM(R) RealView ARM1176 Platform Baseboard.
 

diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index 247b5562047717d066a2ce885ff83c65940f0147..5782d83fd88660f22e1e075118658380b9cc4c20 100644 (file)
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -365,9 +365,11 @@ static void __init realview_eb_init(void)
        if (core_tile_eb11mp()) {
                realview_eb11mp_fixup();
 
+#ifdef CONFIG_CACHE_L2X0
                /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
                 * Bits:  .... ...0 0111 1001 0000 .... .... .... */
                l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff);
+#endif
        }
 
        clk_register(&realview_clcd_clk);

diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
index 4e6731098e5b0b29315aabc5a57fb1d8c78e6e47..cf7f576a5860eae4fec8c102dbe3274dc1c80461 100644 (file)
--- a/arch/arm/mach-realview/realview_pb1176.c
+++ b/arch/arm/mach-realview/realview_pb1176.c
@@ -260,8 +260,10 @@ static void __init realview_pb1176_init(void)
 {
        int i;
 
+#ifdef CONFIG_CACHE_L2X0
        /* 128Kb (16Kb/way) 8-way associativity. evmon/parity/share enabled. */
        l2x0_init(__io_address(REALVIEW_PB1176_L220_BASE), 0x00730000, 0xfe000fff);
+#endif
 
        clk_register(&realview_clcd_clk);
 

diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c
index 7d1fa1fad5e4bbf349cd98fcbef46a010e191967..f7ce1c5a178a7e4613f2c050ae41894f9240dd0f 100644 (file)
--- a/arch/arm/mach-realview/realview_pb11mp.c
+++ b/arch/arm/mach-realview/realview_pb11mp.c
@@ -306,9 +306,11 @@ static void __init realview_pb11mp_init(void)
 {
        int i;
 
+#ifdef CONFIG_CACHE_L2X0
        /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
         * Bits:  .... ...0 0111 1001 0000 .... .... .... */
        l2x0_init(__io_address(REALVIEW_TC11MP_L220_BASE), 0x00790000, 0xfe000fff);
+#endif
 
        clk_register(&realview_clcd_clk);
 

diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index f405435fe64edf48ba1d3c2d1b5733396be5c5f3..3696f4fe45de0c9328aec8a0a332796826980179 100644 (file)
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -701,5 +701,9 @@ config OUTER_CACHE
        default n
 
 config CACHE_L2X0
-       bool
+       bool "Enable the L2x0 outer cache controller"
+       depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176
+       default y
        select OUTER_CACHE
+       help
+         This option enables the L2x0 PrimeCell.