OMAP2/3 clock: don't tinker with hardirqs when they are supposed to be disabled

Clock rate change code executes inside a spinlock with hardirqs
disabled.  The only code that should be messing around with the
hardirq state should be the plat-omap/clock.c code.  In the
omap2_reprogram_dpllcore() case, this probably just wastes cycles, but
in the omap3_core_dpll_m2_set_rate() case, this is a nasty bug.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c
index 9e311aa0cb5fab71f7977a69085d3c9283ff2d80..53864c092702fb36f62b3f3046146792f2b3a641 100644 (file)
--- a/arch/arm/mach-omap2/clock24xx.c
+++ b/arch/arm/mach-omap2/clock24xx.c
@@ -220,10 +220,7 @@ static int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate)
        u32 bypass = 0;
        struct prcm_config tmpset;
        const struct dpll_data *dd;
-       unsigned long flags;
-       int ret = -EINVAL;
 
-       local_irq_save(flags);
        cur_rate = omap2xxx_clk_get_core_rate(&dpll_ck, dpll_ck.parent->rate);
        mult = cm_read_mod_reg(PLL_MOD, CM_CLKSEL2);
        mult &= OMAP24XX_CORE_CLK_SRC_MASK;
@@ -235,7 +232,7 @@ static int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate)
        } else if (rate != cur_rate) {
                valid_rate = omap2_dpllcore_round_rate(rate);
                if (valid_rate != rate)
-                       goto dpll_exit;
+                       return -EINVAL;
 
                if (mult == 1)
                        low = curr_prcm_set->dpll_speed;
@@ -244,7 +241,7 @@ static int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate)
 
                dd = clk->dpll_data;
                if (!dd)
-                       goto dpll_exit;
+                       return -EINVAL;
 
                tmpset.cm_clksel1_pll = cm_read_mod_reg(clk->prcm_mod,
                                                        dd->mult_div1_reg);
@@ -282,11 +279,8 @@ static int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate)
                omap2xxx_sdrc_init_params(omap2xxx_sdrc_dll_is_unlocked());
                omap2xxx_sdrc_reprogram(done_rate, 0);
        }
-       ret = 0;
 
-dpll_exit:
-       local_irq_restore(flags);
-       return(ret);
+       return 0;
 }
 
 /**

diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 824144e313d42f0a157887396be110c8dbf2de01..f7ac5c1c7c09d2474c187e03fae6bc1660ea8d37 100644 (file)
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -491,10 +491,8 @@ static int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate)
        WARN_ON(new_div != 1 && new_div != 2);
 
        /* REVISIT: Add SDRC_MR changing to this code also */
-       local_irq_disable();
        omap3_configure_core_dpll(sp->rfr_ctrl, sp->actim_ctrla,
                                  sp->actim_ctrlb, new_div);
-       local_irq_enable();
 
        return 0;
 }