MIPS: Watch exception handling for HARDWARE_WATCHPOINTS.

Here we hook up the watch exception handler so that it sends SIGTRAP when
the hardware watch registers are triggered.

Signed-off-by: David Daney <ddaney@avtrex.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
index 01dcbe38fa019dc20ac8d4999b818f62ec0ff970..757d48f0d80f2c732636a074f280a6eba443e143 100644 (file)
--- a/arch/mips/kernel/genex.S
+++ b/arch/mips/kernel/genex.S
@@ -453,7 +453,11 @@ NESTED(nmi_handler, PT_SIZE, sp)
        BUILD_HANDLER tr tr sti silent                  /* #13 */
        BUILD_HANDLER fpe fpe fpe silent                /* #15 */
        BUILD_HANDLER mdmx mdmx sti silent              /* #22 */
+#ifdef         CONFIG_HARDWARE_WATCHPOINTS
+       BUILD_HANDLER watch watch sti silent            /* #23 */
+#else
        BUILD_HANDLER watch watch sti verbose           /* #23 */
+#endif
        BUILD_HANDLER mcheck mcheck cli verbose         /* #24 */
        BUILD_HANDLER mt mt sti silent                  /* #25 */
        BUILD_HANDLER dsp dsp sti silent                /* #26 */

diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index b602ac6eb47d8a41454d0bd5e48b7931d6f4ee7f..80b9e070c2078c1dbc988f5ae147832e1624c8b6 100644 (file)
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -42,6 +42,7 @@
 #include <asm/tlbdebug.h>
 #include <asm/traps.h>
 #include <asm/uaccess.h>
+#include <asm/watch.h>
 #include <asm/mmu_context.h>
 #include <asm/types.h>
 #include <asm/stacktrace.h>
@@ -912,13 +913,26 @@ asmlinkage void do_mdmx(struct pt_regs *regs)
 
 asmlinkage void do_watch(struct pt_regs *regs)
 {
+       u32 cause;
+
        /*
-        * We use the watch exception where available to detect stack
-        * overflows.
+        * Clear WP (bit 22) bit of cause register so we don't loop
+        * forever.
         */
-       dump_tlb_all();
-       show_regs(regs);
-       panic("Caught WATCH exception - probably caused by stack overflow.");
+       cause = read_c0_cause();
+       cause &= ~(1 << 22);
+       write_c0_cause(cause);
+
+       /*
+        * If the current thread has the watch registers loaded, save
+        * their values and send SIGTRAP.  Otherwise another thread
+        * left the registers set, clear them and continue.
+        */
+       if (test_tsk_thread_flag(current, TIF_LOAD_WATCH)) {
+               mips_read_watch_registers();
+               force_sig(SIGTRAP, current);
+       } else
+               mips_clear_watch_registers();
 }
 
 asmlinkage void do_mcheck(struct pt_regs *regs)