MIPS: IP checksums: Optimize adjust of sum on buffers of odd alignment.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/lib/csum_partial.S b/arch/mips/lib/csum_partial.S
index 84d5e6a1e76fab376dcb65dd25702f082df1aa22..6b876ca299eeb4d4d7f684a441e70158942968b1 100644 (file)
--- a/arch/mips/lib/csum_partial.S
+++ b/arch/mips/lib/csum_partial.S
@@ -270,13 +270,20 @@ LEAF(csum_partial)
 #endif
 
        /* odd buffer alignment? */
-       beqz    t7, 1f
-        nop
-       sll     v1, sum, 8
+#ifdef CPU_MIPSR2
+       wsbh    v1, sum
+       movn    sum, v1, t7
+#else
+       beqz    t7, 1f                  /* odd buffer alignment? */
+        lui    v1, 0x00ff
+       addu    v1, 0x00ff
+       and     t0, sum, v1
+       sll     t0, t0, 8
        srl     sum, sum, 8
-       or      sum, v1
-       andi    sum, 0xffff
+       and     sum, sum, v1
+       or      sum, sum, t0
 1:
+#endif
        .set    reorder
        /* Add the passed partial csum.  */
        ADDC32(sum, a2)
@@ -663,14 +670,20 @@ EXC(      sb      t0, NBYTES-2(dst), .Ls_exc)
        addu    sum, v1
 #endif
 
-       /* odd buffer alignment? */
-       beqz    odd, 1f
-        nop
-       sll     v1, sum, 8
+#ifdef CPU_MIPSR2
+       wsbh    v1, sum
+       movn    sum, v1, odd
+#else
+       beqz    odd, 1f                 /* odd buffer alignment? */
+        lui    v1, 0x00ff
+       addu    v1, 0x00ff
+       and     t0, sum, v1
+       sll     t0, t0, 8
        srl     sum, sum, 8
-       or      sum, v1
-       andi    sum, 0xffff
+       and     sum, sum, v1
+       or      sum, sum, t0
 1:
+#endif
        .set reorder
        ADDC32(sum, psum)
        jr      ra