w = omap_readw(OMAP1610_DMA_LCD_CTRL);
/* Always set the source port as SDRAM for now*/
w &= ~(0x03 << 6);
- if (lcd_dma.ext_ctrl)
- w |= 1 << 8;
- else
- w &= ~(1 << 8);
if (lcd_dma.callback != NULL)
w |= 1 << 1; /* Block interrupt enable */
else
*/
if (enable_1510_mode || !lcd_dma.ext_ctrl)
return;
+
+ w = omap_readw(OMAP1610_DMA_LCD_CTRL);
+ w |= 1 << 8;
+ omap_writew(w, OMAP1610_DMA_LCD_CTRL);
+
w = omap_readw(OMAP1610_DMA_LCD_CCR);
w |= 1 << 7;
omap_writew(w, OMAP1610_DMA_LCD_CCR);
+
lcd_dma.active = 1;
}
void omap_stop_lcd_dma(void)
{
+ u16 w;
+
lcd_dma.active = 0;
- if (!enable_1510_mode && lcd_dma.ext_ctrl)
- omap_writew(omap_readw(OMAP1610_DMA_LCD_CCR) & ~(1 << 7),
- OMAP1610_DMA_LCD_CCR);
+ if (enable_1510_mode || !lcd_dma.ext_ctrl)
+ return;
+
+ w = omap_readw(OMAP1610_DMA_LCD_CCR);
+ w &= ~(1 << 7);
+ omap_writew(w, OMAP1610_DMA_LCD_CCR);
+
+ w = omap_readw(OMAP1610_DMA_LCD_CTRL);
+ w &= ~(1 << 8);
+ omap_writew(w, OMAP1610_DMA_LCD_CTRL);
}
/*
(OMAP_DMA_CDSA_U(lch) << 16));
}
+int omap_dma_running(void)
+{
+ int lch;
+
+ /* Check if LCD DMA is running */
+ if (cpu_is_omap16xx())
+ if (omap_readw(OMAP1610_DMA_LCD_CCR) & OMAP_DMA_CCR_EN)
+ return 1;
+
+ for (lch = 0; lch < dma_chan_count; lch++) {
+ u16 w;
+
+ w = omap_readw(OMAP_DMA_CCR(lch));
+ if (w & OMAP_DMA_CCR_EN)
+ return 1;
+ }
+ return 0;
+}
+
static int __init omap_init_dma(void)
{
int ch, r;
extern dma_addr_t omap_get_dma_src_pos(int lch);
extern dma_addr_t omap_get_dma_dst_pos(int lch);
extern void omap_clear_dma(int lch);
+extern int omap_dma_running(void);
/* Returns 1 if the DMA module is in OMAP1510-compatible mode, 0 otherwise */
extern int omap_dma_in_1510_mode(void);