#include <linux/init.h>
 #include <sound/core.h>
 #include <sound/emu10k1.h>
+#include <linux/delay.h>
 
 #define AC97_ID_STAC9758       0x83847658
 
        EMU1010_DAC_PADS("DAC1 0202 14dB PAD Playback Switch", EMU_HANA_0202_DAC_PAD1),
 };
 
+
+static int snd_emu1010_internal_clock_info(struct snd_kcontrol *kcontrol,
+                                         struct snd_ctl_elem_info *uinfo)
+{
+       static char *texts[2] = {
+               "44100", "48000"
+       };
+
+       uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
+       uinfo->count = 1;
+       uinfo->value.enumerated.items = 2;
+       if (uinfo->value.enumerated.item > 1)
+                uinfo->value.enumerated.item = 1;
+       strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
+       return 0;
+}
+
+static int snd_emu1010_internal_clock_get(struct snd_kcontrol *kcontrol,
+                                       struct snd_ctl_elem_value *ucontrol)
+{
+       struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
+
+       ucontrol->value.enumerated.item[0] = emu->emu1010.internal_clock;
+       return 0;
+}
+
+static int snd_emu1010_internal_clock_put(struct snd_kcontrol *kcontrol,
+                                       struct snd_ctl_elem_value *ucontrol)
+{
+       struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
+       unsigned int val;
+       int change = 0;
+
+       val = ucontrol->value.enumerated.item[0] ;
+       change = (emu->emu1010.internal_clock != val);
+       if (change) {
+               emu->emu1010.internal_clock = val;
+               switch (val) {
+               case 0:
+                       /* 44100 */
+                       /* Mute all */
+                       snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_MUTE );
+                       /* Default fallback clock 48kHz */
+                       snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, EMU_HANA_DEFCLOCK_44_1K );
+                       /* Word Clock source, Internal 44.1kHz x1 */
+                       snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK,
+                       EMU_HANA_WCLOCK_INT_44_1K | EMU_HANA_WCLOCK_1X );
+                       /* Set LEDs on Audio Dock */
+                       snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2,
+                               EMU_HANA_DOCK_LEDS_2_44K | EMU_HANA_DOCK_LEDS_2_LOCK );
+                       /* Allow DLL to settle */
+                       udelay(10000);
+                       /* Unmute all */
+                       snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE );
+                       break;
+               case 1:
+                       /* 48000 */
+                       /* Mute all */
+                       snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_MUTE );
+                       /* Default fallback clock 48kHz */
+                       snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, EMU_HANA_DEFCLOCK_48K );
+                       /* Word Clock source, Internal 48kHz x1 */
+                       snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK,
+                               EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_1X );
+                       /* Set LEDs on Audio Dock */
+                       snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2,
+                               EMU_HANA_DOCK_LEDS_2_48K | EMU_HANA_DOCK_LEDS_2_LOCK );
+                       /* Allow DLL to settle */
+                       udelay(10000);
+                       /* Unmute all */
+                       snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE );
+                       break;
+               }
+       }
+        return change;
+}
+
+static struct snd_kcontrol_new snd_emu1010_internal_clock =
+{
+       .access =       SNDRV_CTL_ELEM_ACCESS_READWRITE,
+       .iface =        SNDRV_CTL_ELEM_IFACE_MIXER,
+       .name =         "Clock Internal Rate",
+       .count =        1,
+       .info =         snd_emu1010_internal_clock_info,
+       .get =          snd_emu1010_internal_clock_get,
+       .put =          snd_emu1010_internal_clock_put
+};
+
 #if 0
 static int snd_audigy_spdif_output_rate_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
 {
                        if (err < 0)
                                return err;
                }
+               err = snd_ctl_add(card, snd_ctl_new1(&snd_emu1010_internal_clock, emu));
+               if (err < 0)
+                       return err;
        }
                
        return 0;
 
        snd_emu10k1_ptr_write(emu, PTRX, voice, (send_amount[0] << 8) | send_amount[1]);
        snd_emu10k1_ptr_write(emu, DSL, voice, end_addr | (send_amount[3] << 24));
        snd_emu10k1_ptr_write(emu, PSST, voice, start_addr | (send_amount[2] << 24));
-       pitch_target = emu10k1_calc_pitch_target(runtime->rate);
+       if (emu->card_capabilities->emu1010)
+               pitch_target = PITCH_48000; /* Disable interpolators on emu1010 card */
+       else 
+               pitch_target = emu10k1_calc_pitch_target(runtime->rate);
        if (extra)
                snd_emu10k1_ptr_write(emu, CCCA, voice, start_addr |
                              emu10k1_select_interprom(pitch_target) |
        voice = evoice->number;
 
        pitch = snd_emu10k1_rate_to_pitch(runtime->rate) >> 8;
-       pitch_target = emu10k1_calc_pitch_target(runtime->rate);
+       if (emu->card_capabilities->emu1010)
+               pitch_target = PITCH_48000; /* Disable interpolators on emu1010 card */
+       else 
+               pitch_target = emu10k1_calc_pitch_target(runtime->rate);
        snd_emu10k1_ptr_write(emu, PTRX_PITCHTARGET, voice, pitch_target);
        if (master || evoice->epcm->type == PLAYBACK_EFX)
                snd_emu10k1_ptr_write(emu, CPF_CURRENTPITCH, voice, pitch_target);
                 * for 192kHz 24bit, one has 2 channels
                 */
 #if 1
-               /* For 48kHz */
-               runtime->hw.rates = SNDRV_PCM_RATE_48000;
-               runtime->hw.rate_min = runtime->hw.rate_max = 48000;
-               runtime->hw.channels_min = runtime->hw.channels_max = 8;
+               switch (emu->emu1010.internal_clock) {
+               case 0:
+                       /* For 44.1kHz */
+                       runtime->hw.rates = SNDRV_PCM_RATE_44100;
+                       runtime->hw.rate_min = runtime->hw.rate_max = 44100;
+                       runtime->hw.channels_min = runtime->hw.channels_max = 8;
+                       break;
+               case 1:
+                       /* For 48kHz */
+                       runtime->hw.rates = SNDRV_PCM_RATE_48000;
+                       runtime->hw.rate_min = runtime->hw.rate_max = 48000;
+                       runtime->hw.channels_min = runtime->hw.channels_max = 8;
+                       break;
+               };
 #endif
 #if 0
                /* For 96kHz */