Fix mcbsp clock definition on clock34xx.h

This patch fix the clock definition for mcbsps on clock34xx.h.
Device identification must be done using .id field, not
only name field.

Signed-off-by: Eduardo Valentin <eduardo.valentin@indt.org.br>

diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index ebd664e02eed0769d40e9301282381a4c1a1bd20..330902416a20f20b6f072ddcd6791b8700b61f6c 100644 (file)
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -1483,7 +1483,8 @@ static const struct clksel mcbsp_15_clksel[] = {
 };
 
 static struct clk mcbsp5_fck = {
-       .name           = "mcbsp5_fck",
+       .name           = "mcbsp_fck",
+       .id             = 5,
        .init           = &omap2_init_clksel_parent,
        .enable_reg     = _OMAP34XX_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
        .enable_bit     = OMAP3430_EN_MCBSP5_SHIFT,
@@ -1496,7 +1497,8 @@ static struct clk mcbsp5_fck = {
 };
 
 static struct clk mcbsp1_fck = {
-       .name           = "mcbsp1_fck",
+       .name           = "mcbsp_fck",
+       .id             = 1,
        .init           = &omap2_init_clksel_parent,
        .enable_reg     = _OMAP34XX_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
        .enable_bit     = OMAP3430_EN_MCBSP1_SHIFT,
@@ -1944,7 +1946,8 @@ static struct clk gpt10_ick = {
 };
 
 static struct clk mcbsp5_ick = {
-       .name           = "mcbsp5_ick",
+       .name           = "mcbsp_ick",
+       .id             = 5,
        .parent         = &core_l4_ick,
        .enable_reg     = _OMAP34XX_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
        .enable_bit     = OMAP3430_EN_MCBSP5_SHIFT,
@@ -1954,7 +1957,8 @@ static struct clk mcbsp5_ick = {
 };
 
 static struct clk mcbsp1_ick = {
-       .name           = "mcbsp1_ick",
+       .name           = "mcbsp_ick",
+       .id             = 1,
        .parent         = &core_l4_ick,
        .enable_reg     = _OMAP34XX_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
        .enable_bit     = OMAP3430_EN_MCBSP1_SHIFT,
@@ -2757,7 +2761,8 @@ static struct clk gpt2_ick = {
 };
 
 static struct clk mcbsp2_ick = {
-       .name           = "mcbsp2_ick",
+       .name           = "mcbsp_ick",
+       .id             = 2,
        .parent         = &per_l4_ick,
        .enable_reg     = _OMAP34XX_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
        .enable_bit     = OMAP3430_EN_MCBSP2_SHIFT,
@@ -2767,7 +2772,8 @@ static struct clk mcbsp2_ick = {
 };
 
 static struct clk mcbsp3_ick = {
-       .name           = "mcbsp3_ick",
+       .name           = "mcbsp_ick",
+       .id             = 3,
        .parent         = &per_l4_ick,
        .enable_reg     = _OMAP34XX_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
        .enable_bit     = OMAP3430_EN_MCBSP3_SHIFT,
@@ -2777,7 +2783,8 @@ static struct clk mcbsp3_ick = {
 };
 
 static struct clk mcbsp4_ick = {
-       .name           = "mcbsp4_ick",
+       .name           = "mcbsp_ick",
+       .id             = 4,
        .parent         = &per_l4_ick,
        .enable_reg     = _OMAP34XX_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
        .enable_bit     = OMAP3430_EN_MCBSP4_SHIFT,
@@ -2793,7 +2800,8 @@ static const struct clksel mcbsp_234_clksel[] = {
 };
 
 static struct clk mcbsp2_fck = {
-       .name           = "mcbsp2_fck",
+       .name           = "mcbsp_fck",
+       .id             = 2,
        .init           = &omap2_init_clksel_parent,
        .enable_reg     = _OMAP34XX_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
        .enable_bit     = OMAP3430_EN_MCBSP2_SHIFT,
@@ -2806,7 +2814,8 @@ static struct clk mcbsp2_fck = {
 };
 
 static struct clk mcbsp3_fck = {
-       .name           = "mcbsp3_fck",
+       .name           = "mcbsp_fck",
+       .id             = 3,
        .init           = &omap2_init_clksel_parent,
        .enable_reg     = _OMAP34XX_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
        .enable_bit     = OMAP3430_EN_MCBSP3_SHIFT,
@@ -2819,7 +2828,8 @@ static struct clk mcbsp3_fck = {
 };
 
 static struct clk mcbsp4_fck = {
-       .name           = "mcbsp4_fck",
+       .name           = "mcbsp_fck",
+       .id             = 4,
        .init           = &omap2_init_clksel_parent,
        .enable_reg     = _OMAP34XX_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
        .enable_bit     = OMAP3430_EN_MCBSP4_SHIFT,