]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
[PATCH] ppc32: Re-order cputable for 750CXe DD2.4 entry
authorArthur Othieno <a.othieno@bluewin.ch>
Sat, 3 Sep 2005 22:55:51 +0000 (15:55 -0700)
committerLinus Torvalds <torvalds@evo.osdl.org>
Mon, 5 Sep 2005 07:05:59 +0000 (00:05 -0700)
"745/755" (pvr_value:0x00083000) is a catch-all entry.
Since arch/ppc/kernel/misc.S:identify_cpu() returns on first match,
move this lower in the table so 750CXe DD2.4 (pvr_value:0x00083214)
may be correctly enumerated.

Signed-off-by: Arthur Othieno <a.othieno@bluewin.ch>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
arch/ppc/kernel/cputable.c

index 61382341bb01b8dbd89635c0dca35f89c82cacc7..9ab2fad5e56db1e6a2ab8d70bee30d201611850b 100644 (file)
@@ -198,20 +198,6 @@ struct cpu_spec    cpu_specs[] = {
                .num_pmcs               = 4,
                .cpu_setup              = __setup_cpu_750
        },
-       {       /* 745/755 */
-               .pvr_mask               = 0xfffff000,
-               .pvr_value              = 0x00083000,
-               .cpu_name               = "745/755",
-               .cpu_features           = CPU_FTR_COMMON |
-                       CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
-                       CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
-                       CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP,
-               .cpu_user_features      = COMMON_PPC,
-               .icache_bsize           = 32,
-               .dcache_bsize           = 32,
-               .num_pmcs               = 4,
-               .cpu_setup              = __setup_cpu_750
-       },
        {       /* 750CX (80100 and 8010x?) */
                .pvr_mask               = 0xfffffff0,
                .pvr_value              = 0x00080100,
@@ -254,6 +240,20 @@ struct cpu_spec    cpu_specs[] = {
                .num_pmcs               = 4,
                .cpu_setup              = __setup_cpu_750cx
        },
+       {       /* 745/755 */
+               .pvr_mask               = 0xfffff000,
+               .pvr_value              = 0x00083000,
+               .cpu_name               = "745/755",
+               .cpu_features           = CPU_FTR_COMMON |
+                       CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
+                       CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
+                       CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP,
+               .cpu_user_features      = COMMON_PPC,
+               .icache_bsize           = 32,
+               .dcache_bsize           = 32,
+               .num_pmcs               = 4,
+               .cpu_setup              = __setup_cpu_750
+       },
        {       /* 750FX rev 1.x */
                .pvr_mask               = 0xffffff00,
                .pvr_value              = 0x70000100,