]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
[MIPS] MT: Fix setting of XTC.
authorElizabeth Oldham <beth@mips.com>
Thu, 17 Aug 2006 11:39:21 +0000 (12:39 +0100)
committerRalf Baechle <ralf@linux-mips.org>
Wed, 27 Sep 2006 12:37:36 +0000 (13:37 +0100)
XTC can only be set if VPA is clear, which it may not be. There is
also the possibility of a back to back c0 register access hazard to
take care of.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/kernel/vpe.c

index 9ee0ec2cd067ccb31e787b9ba2fbe30b6b0df52b..51ddd216689850d5d0113dee662782ef82c3da8f 100644 (file)
@@ -768,10 +768,16 @@ int vpe_run(struct vpe * v)
         */
        write_tc_c0_tcbind((read_tc_c0_tcbind() & ~TCBIND_CURVPE) | v->minor);
 
+       write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() & ~(VPECONF0_VPA));
+
+       back_to_back_c0_hazard();
+
         /* Set up the XTC bit in vpeconf0 to point at our tc */
         write_vpe_c0_vpeconf0( (read_vpe_c0_vpeconf0() & ~(VPECONF0_XTC))
                                | (t->index << VPECONF0_XTC_SHIFT));
 
+       back_to_back_c0_hazard();
+
         /* enable this VPE */
         write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() | VPECONF0_VPA);