ARM: OMAP2: Add CM registers for EHCI host on omap34xx

This patch adds CM defines used by OMAP EHCI on OMAP34xx.
Incorporated Paul Walmsley review comments.

Signed-off-by: Vikram Pandita <vikram.pandita@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h
index fc3dea630a5b2f2fc6030d1edf04f2aa90e97865..53cacc995b5130d04d78e3360ff13d8089c286c8 100644 (file)
--- a/arch/arm/mach-omap2/cm.h
+++ b/arch/arm/mach-omap2/cm.h
@@ -124,6 +124,8 @@ static u32 __attribute__((unused)) cm_read_mod_reg(s16 module, s16 idx)
 #define OMAP3430ES2_CM_CLKSEL5                         0x0050
 #define OMAP3430_CM_CLKSEL2_EMU                                0x0050
 #define OMAP3430_CM_CLKSEL3_EMU                                0x0054
+#define OMAP3430_CM_IDLEST3_CORE                       0x0028
+#define OMAP3430_CM_AUTOIDLE3_CORE                     0x0038
 
 
 

diff --git a/arch/arm/mach-omap2/cm_regbits_34xx.h b/arch/arm/mach-omap2/cm_regbits_34xx.h
index e31ff225039203d856c05e18257ef473dedb84df..fcb7c1297c2463f3f33e435610f06599543d4556 100644 (file)
--- a/arch/arm/mach-omap2/cm_regbits_34xx.h
+++ b/arch/arm/mach-omap2/cm_regbits_34xx.h
@@ -198,6 +198,10 @@
 #define OMAP3430_ST_SHA11                              (1 << 1)
 #define OMAP3430_ST_DES1                               (1 << 0)
 
+/* CM_IDLEST3_CORE */
+#define OMAP3430_ST_USBTLL                             (1 << 2)
+#define OMAP3430_ST_USBTLL_SHIFT                       2
+
 /* CM_AUTOIDLE1_CORE */
 #define OMAP3430_AUTO_AES2                             (1 << 28)
 #define OMAP3430_AUTO_AES2_SHIFT                       28
@@ -266,6 +270,10 @@
 #define OMAP3430_AUTO_DES1                             (1 << 0)
 #define OMAP3430_AUTO_DES1_SHIFT                       0
 
+/* CM_AUTOIDLE3_CORE */
+#define OMAP3430_AUTO_USBTLL                           (1 << 2)
+#define OMAP3430_AUTO_USBTLL_SHIFT                     2
+
 /* CM_CLKSEL_CORE */
 #define OMAP3430_CLKSEL_SSI_SHIFT                      8
 #define OMAP3430_CLKSEL_SSI_MASK                       (0xf << 8)
@@ -384,9 +392,11 @@
 /* CM_CLKEN2_PLL */
 #define OMAP3430ES2_EN_PERIPH2_DPLL_LPMODE_SHIFT               10
 #define OMAP3430ES2_PERIPH2_DPLL_RAMPTIME_MASK         (0x3 << 8)
+#define OMAP3430ES2_PERIPH2_DPLL_FREQSEL_SHIFT         4
 #define OMAP3430ES2_PERIPH2_DPLL_FREQSEL_MASK          (0xf << 4)
 #define OMAP3430ES2_EN_PERIPH2_DPLL_DRIFTGUARD_SHIFT   3
-#define OMAP3430ES2_EN_PERIPH2_DPLL_MASK                       (0x7 << 0)
+#define OMAP3430ES2_EN_PERIPH2_DPLL_SHIFT              0
+#define OMAP3430ES2_EN_PERIPH2_DPLL_MASK               (0x7 << 0)
 
 /* CM_IDLEST_CKGEN */
 #define OMAP3430_ST_54M_CLK                            (1 << 5)
@@ -396,6 +406,10 @@
 #define OMAP3430_ST_PERIPH_CLK                         (1 << 1)
 #define OMAP3430_ST_CORE_CLK                           (1 << 0)
 
+/* CM_IDLEST2_CKGEN */
+#define OMAP3430_ST_120M_CLK                           (1 << 1)
+#define OMAP3430_ST_PERIPH2_CLK                                (1 << 0)
+
 /* CM_AUTOIDLE_PLL */
 #define OMAP3430_AUTO_PERIPH_DPLL_SHIFT                        3
 #define OMAP3430_AUTO_PERIPH_DPLL_MASK                 (0x7 << 3)
@@ -424,10 +438,13 @@
 #define OMAP3430_DIV_96M_MASK                          (0x1f << 0)
 
 /* CM_CLKSEL4_PLL */
+#define OMAP3430ES2_PERIPH2_DPLL_MULT_SHIFT            8
 #define OMAP3430ES2_PERIPH2_DPLL_MULT_MASK             (0x7ff << 8)
+#define OMAP3430ES2_PERIPH2_DPLL_DIV_SHIFT             0
 #define OMAP3430ES2_PERIPH2_DPLL_DIV_MASK              (0x7f << 0)
 
 /* CM_CLKSEL5_PLL */
+#define OMAP3430ES2_DIV_120M_SHIFT                     0
 #define OMAP3430ES2_DIV_120M_MASK                      (0x1f << 0)
 
 /* CM_CLKOUT_CTRL */
@@ -629,4 +646,22 @@
 #define OMAP3430ES2_EN_USBHOST_SHIFT                   0
 #define OMAP3430ES2_EN_USBHOST_MASK                    (1 << 0)
 
+/* CM_IDLEST_USBHOST */
+
+/* CM_AUTOIDLE_USBHOST */
+#define OMAP3430ES2_AUTO_USBHOST_SHIFT                 0
+#define OMAP3430ES2_AUTO_USBHOST_MASK                  (1<<0)
+
+/* CM_SLEEPDEP_USBHOST */
+#define OMAP3430ES2_EN_MPU_SHIFT                       1
+#define OMAP3430ES2_EN_MPU_MASK                                (1<<1)
+#define OMAP3430ES2_EN_IVA2_SHIFT                      2
+#define OMAP3430ES2_EN_IVA2_MASK                       (1<<2)
+
+/* CM_CLKSTCTRL_USBHOST */
+#define OMAP3430ES2_CLKTRCTRL_USBHOST_SHIFT            0
+#define OMAP3430ES2_CLKTRCTRL_USBHOST_MASK             (3<<0)
+
+
+
 #endif