OMAP3_PRM_VC_I2C_CFG_OFFSET);
/* Setup voltctrl and other setup times */
-
-#ifdef CONFIG_OMAP_SYSOFFMODE
- prm_write_mod_reg(OMAP3430_AUTO_OFF | OMAP3430_AUTO_RET |
- OMAP3430_SEL_OFF, OMAP3430_GR_MOD,
+ prm_write_mod_reg(OMAP3430_AUTO_RET, OMAP3430_GR_MOD,
OMAP3_PRM_VOLTCTRL_OFFSET);
prm_write_mod_reg(OMAP3430_CLKSETUP_DURATION, OMAP3430_GR_MOD,
OMAP3_PRM_VOLTOFFSET_OFFSET);
prm_write_mod_reg(OMAP3430_VOLTSETUP2_DURATION, OMAP3430_GR_MOD,
OMAP3_PRM_VOLTSETUP2_OFFSET);
-#else
- prm_set_mod_reg_bits(OMAP3430_AUTO_RET, OMAP3430_GR_MOD,
- OMAP3_PRM_VOLTCTRL_OFFSET);
-#endif
-
}
static int __init omap3_pm_early_init(void)
#define OMAP3430_VC_CMD_VAL0_ON (0x3 << 4)
#define OMAP3430_VC_CMD_VAL0_ONLP (0x3 << 3)
#define OMAP3430_VC_CMD_VAL0_RET (0x3 << 3)
-#define OMAP3430_VC_CMD_VAL0_OFF (0x3 << 3)
+#define OMAP3430_VC_CMD_VAL0_OFF (0x3 << 4)
/* PRM_VC_CMD_VAL_1 specific bits */
#define OMAP3430_VC_CMD_VAL1_ON (0xB << 2)
#define OMAP3430_VC_CMD_VAL1_ONLP (0x3 << 3)
#define OMAP3430_VC_CMD_VAL1_RET (0x3 << 3)
-#define OMAP3430_VC_CMD_VAL1_OFF (0x3 << 3)
+#define OMAP3430_VC_CMD_VAL1_OFF (0xB << 2)
/* PRM_VC_CH_CONF */
#define OMAP3430_CMD1 (1 << 20)