]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
[ARM] VIC: Update asm/hardware/vic.h with PL192 information
authorBen Dooks <ben-linux@fluff.org>
Tue, 21 Oct 2008 13:07:06 +0000 (14:07 +0100)
committerBen Dooks <ben-linux@fluff.org>
Mon, 15 Dec 2008 23:03:10 +0000 (23:03 +0000)
The original arch/arm/include/asm/hardware/vic.h was
written for the PL190 ARM VIC implementation, and as
such does not have any information about the PL192
version.

Add details about the PL192 and PL190 specific registers
and any changes between the two units.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
arch/arm/common/vic.c
arch/arm/include/asm/hardware/vic.h

index f1e4b8f60cab026e773514e61d3ee682f478fc01..ecf0bfbab107362e38d8debdd7437103e7e02202 100644 (file)
@@ -69,12 +69,12 @@ void __init vic_init(void __iomem *base, unsigned int irq_start,
        /*
         * Make sure we clear all existing interrupts
         */
-       writel(0, base + VIC_VECT_ADDR);
+       writel(0, base + VIC_PL190_VECT_ADDR);
        for (i = 0; i < 19; i++) {
                unsigned int value;
 
-               value = readl(base + VIC_VECT_ADDR);
-               writel(value, base + VIC_VECT_ADDR);
+               value = readl(base + VIC_PL190_VECT_ADDR);
+               writel(value, base + VIC_PL190_VECT_ADDR);
        }
 
        for (i = 0; i < 16; i++) {
@@ -82,7 +82,7 @@ void __init vic_init(void __iomem *base, unsigned int irq_start,
                writel(VIC_VECT_CNTL_ENABLE | i, reg);
        }
 
-       writel(32, base + VIC_DEF_VECT_ADDR);
+       writel(32, base + VIC_PL190_DEF_VECT_ADDR);
 
        for (i = 0; i < 32; i++) {
                unsigned int irq = irq_start + i;
index 263f2c362a306166e92812963b42c10992d79fb1..f87328d4a180e284d99b061de2fb9697719efebe 100644 (file)
 #define VIC_INT_SOFT                   0x18
 #define VIC_INT_SOFT_CLEAR             0x1c
 #define VIC_PROTECT                    0x20
-#define VIC_VECT_ADDR                  0x30
-#define VIC_DEF_VECT_ADDR              0x34
+#define VIC_PL190_VECT_ADDR            0x30    /* PL190 only */
+#define VIC_PL190_DEF_VECT_ADDR                0x34    /* PL190 only */
 
-#define VIC_VECT_ADDR0                 0x100   /* 0 to 15 */
-#define VIC_VECT_CNTL0                 0x200   /* 0 to 15 */
+#define VIC_VECT_ADDR0                 0x100   /* 0 to 15 (0..31 PL192) */
+#define VIC_VECT_CNTL0                 0x200   /* 0 to 15 (0..31 PL192) */
 #define VIC_ITCR                       0x300   /* VIC test control register */
 
 #define VIC_VECT_CNTL_ENABLE           (1 << 5)
 
+#define VIC_PL192_VECT_ADDR            0xF00
+
 #ifndef __ASSEMBLY__
 void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources);
 #endif