if (can_bulk_split(musb, ep->type))
return ep->hw_ep->max_packet_sz_tx;
else
- return ep->wPacketSize;
+ return ep->packet_sz;
}
}
DBG(4, "hw_ep%d, maxpacket %d, fifo count %d, txcsr %03x\n",
- epnum, musb_ep->wPacketSize, fifo_count,
+ epnum, musb_ep->packet_sz, fifo_count,
csr);
#ifndef CONFIG_USB_INVENTRA_FIFO
/* setup DMA, then program endpoint CSR */
request_size = min(request->length,
musb_ep->dma->max_len);
- if (request_size <= musb_ep->wPacketSize)
+ if (request_size <= musb_ep->packet_sz)
musb_ep->dma->desired_mode = 0;
else
musb_ep->dma->desired_mode = 1;
use_dma = use_dma && c->channel_program(
- musb_ep->dma, musb_ep->wPacketSize,
+ musb_ep->dma, musb_ep->packet_sz,
musb_ep->dma->desired_mode,
request->dma, request_size);
if (use_dma) {
* except for the last-packet-is-already-short case.
*/
use_dma = use_dma && c->channel_program(
- musb_ep->dma, musb_ep->wPacketSize,
+ musb_ep->dma, musb_ep->packet_sz,
0,
request->dma,
request->length);
}
#elif defined(CONFIG_USB_TUSB_OMAP_DMA)
use_dma = use_dma && c->channel_program(
- musb_ep->dma, musb_ep->wPacketSize,
+ musb_ep->dma, musb_ep->packet_sz,
request->zero,
request->dma,
request->length);
if ((request->zero
&& request->length
&& (request->length
- % musb_ep->wPacketSize)
+ % musb_ep->packet_sz)
== 0)
#ifdef CONFIG_USB_INVENTRA_DMA
|| (is_dma &&
((!dma->desired_mode) ||
(request->actual &
- (musb_ep->wPacketSize - 1))))
+ (musb_ep->packet_sz - 1))))
#endif
) {
/* on dma completion, fifo may not
struct musb_ep *musb_ep = &musb->endpoints[epnum].ep_out;
void __iomem *epio = musb->endpoints[epnum].regs;
u16 fifo_count = 0;
- u16 len = musb_ep->wPacketSize;
+ u16 len = musb_ep->packet_sz;
csr = musb_readw(epio, MGC_O_HDRC_RXCSR);
* faults will be handled correctly.
*/
if (c->channel_program(channel,
- musb_ep->wPacketSize,
+ musb_ep->packet_sz,
!request->short_not_ok,
request->dma + request->actual,
request->length - request->actual)) {
#else
transfer_size = len;
#endif
- if (transfer_size <= musb_ep->wPacketSize)
+ if (transfer_size <= musb_ep->packet_sz)
musb_ep->dma->desired_mode = 0;
else
musb_ep->dma->desired_mode = 1;
use_dma = c->channel_program(
channel,
- musb_ep->wPacketSize,
+ musb_ep->packet_sz,
channel->desired_mode,
request->dma
+ request->actual,
DBG(3, "%s OUT/RX pio fifo %d/%d, maxpacket %d\n",
musb_ep->end_point.name,
len, fifo_count,
- musb_ep->wPacketSize);
+ musb_ep->packet_sz);
fifo_count = min(len, fifo_count);
int ret;
ret = c->channel_program(channel,
- musb_ep->wPacketSize,
+ musb_ep->packet_sz,
channel->desired_mode,
dma_addr,
fifo_count);
}
/* reach the end or short packet detected */
- if (request->actual == request->length || len < musb_ep->wPacketSize)
+ if (request->actual == request->length || len < musb_ep->packet_sz)
musb_g_giveback(musb_ep, request, 0);
}
/* Autoclear doesn't clear RxPktRdy for short packets */
if ((dma->desired_mode == 0)
|| (dma->actual_len
- & (musb_ep->wPacketSize - 1))) {
+ & (musb_ep->packet_sz - 1))) {
/* ack the read! */
csr &= ~MGC_M_RXCSR_RXPKTRDY;
musb_writew(epio, MGC_O_HDRC_RXCSR, csr);
/* incomplete, and not short? wait for next IN packet */
if ((request->actual < request->length)
&& (musb_ep->dma->actual_len
- == musb_ep->wPacketSize))
+ == musb_ep->packet_sz))
goto done;
#endif
musb_g_giveback(musb_ep, request, 0);
tmp = le16_to_cpu(desc->wMaxPacketSize);
if (tmp & ~0x07ff)
goto fail;
- musb_ep->wPacketSize = tmp;
+ musb_ep->packet_sz = tmp;
/* enable the interrupts for the endpoint, set the endpoint
* packet size (or fail), set the mode, clear the fifo
}; s; }),
musb_ep->is_in ? "IN" : "OUT",
musb_ep->dma ? "dma, " : "",
- musb_ep->wPacketSize);
+ musb_ep->packet_sz);
schedule_work(&musb->irq_work);
/* ... when enabled/disabled ... */
u8 type;
u8 is_in;
- u16 wPacketSize;
+ u16 packet_sz;
const struct usb_endpoint_descriptor *desc;
struct dma_channel *dma;
struct musb_hw_ep *hw_ep = musb->endpoints + epnum;
void __iomem *epio = hw_ep->regs;
struct musb_qh *qh;
- u16 wPacketSize;
+ u16 packet_sz;
if (!is_out || hw_ep->is_shared_fifo)
qh = hw_ep->in_qh;
else
qh = hw_ep->out_qh;
- wPacketSize = qh->maxpacket;
+ packet_sz = qh->maxpacket;
DBG(3, "%s hw%d urb %p spd%d dev%d ep%d%s "
"h_addr%02x h_port%02x bytes %d\n",
musb_writeb(epio, MGC_O_HDRC_TXTYPE, qh->type_reg);
if (can_bulk_split(musb, qh->type))
musb_writew(epio, MGC_O_HDRC_TXMAXP,
- wPacketSize
+ packet_sz
| ((hw_ep->max_packet_sz_tx /
- wPacketSize) - 1) << 11);
+ packet_sz) - 1) << 11);
else
musb_writew(epio, MGC_O_HDRC_TXMAXP,
- wPacketSize);
+ packet_sz);
musb_writeb(epio, MGC_O_HDRC_TXINTERVAL, qh->intv_reg);
} else {
musb_writeb(epio, MGC_O_HDRC_NAKLIMIT0, qh->intv_reg);
wLoadCount = min((u32) hw_ep->max_packet_sz_tx,
dwLength);
else
- wLoadCount = min((u32) wPacketSize, dwLength);
+ wLoadCount = min((u32) packet_sz, dwLength);
#ifdef CONFIG_USB_INVENTRA_DMA
if (pDmaChannel) {
qh->segsize = min(dwLength, pDmaChannel->max_len);
- if (qh->segsize <= wPacketSize)
+ if (qh->segsize <= packet_sz)
pDmaChannel->desired_mode = 0;
else
pDmaChannel->desired_mode = 1;
musb_writew(epio, MGC_O_HDRC_TXCSR, wCsr);
bDmaOk = dma_controller->channel_program(
- pDmaChannel, wPacketSize,
+ pDmaChannel, packet_sz,
pDmaChannel->desired_mode,
pUrb->transfer_dma,
qh->segsize);
* to identify the zero-length-final-packet case.
*/
bDmaOk = dma_controller->channel_program(
- pDmaChannel, wPacketSize,
+ pDmaChannel, packet_sz,
(pUrb->transfer_flags
& URB_ZERO_PACKET)
== URB_ZERO_PACKET,
* errors, we dare not queue multiple transfers.
*/
bDmaOk = dma_controller->channel_program(
- pDmaChannel, wPacketSize,
+ pDmaChannel, packet_sz,
!(pUrb->transfer_flags
& URB_SHORT_NOT_OK),
pUrb->transfer_dma,
}
static void configure_channel(struct dma_channel *pChannel,
- u16 wPacketSize, u8 mode,
+ u16 packet_sz, u8 mode,
dma_addr_t dma_addr, u32 dwLength)
{
struct musb_dma_channel *pImplChannel =
u16 wCsr = 0;
DBG(4, "%p, pkt_sz %d, addr 0x%x, len %d, mode %d\n",
- pChannel, wPacketSize, dma_addr, dwLength, mode);
+ pChannel, packet_sz, dma_addr, dwLength, mode);
if (mode) {
wCsr |= 1 << MGC_S_HSDMA_MODE1;
- if (dwLength < wPacketSize) {
+ if (dwLength < packet_sz) {
return FALSE;
}
- if (wPacketSize >= 64) {
+ if (packet_sz >= 64) {
wCsr |=
MGC_HSDMA_BURSTMODE_INCR16 << MGC_S_HSDMA_BURSTMODE;
- } else if (wPacketSize >= 32) {
+ } else if (packet_sz >= 32) {
wCsr |=
MGC_HSDMA_BURSTMODE_INCR8 << MGC_S_HSDMA_BURSTMODE;
- } else if (wPacketSize >= 16) {
+ } else if (packet_sz >= 16) {
wCsr |=
MGC_HSDMA_BURSTMODE_INCR4 << MGC_S_HSDMA_BURSTMODE;
}
}
static int dma_channel_program(struct dma_channel * pChannel,
- u16 wPacketSize, u8 mode,
+ u16 packet_sz, u8 mode,
dma_addr_t dma_addr, u32 dwLength)
{
struct musb_dma_channel *pImplChannel =
DBG(2, "ep%d-%s pkt_sz %d, dma_addr 0x%x length %d, mode %d\n",
pImplChannel->epnum,
pImplChannel->bTransmit ? "Tx" : "Rx",
- wPacketSize, dma_addr, dwLength, mode);
+ packet_sz, dma_addr, dwLength, mode);
BUG_ON(pChannel->status == MGC_DMA_STATUS_UNKNOWN ||
pChannel->status == MGC_DMA_STATUS_BUSY);
pChannel->actual_len = 0;
pImplChannel->dwStartAddress = dma_addr;
pImplChannel->len = dwLength;
- pImplChannel->wMaxPacketSize = wPacketSize;
+ pImplChannel->wMaxPacketSize = packet_sz;
pChannel->status = MGC_DMA_STATUS_BUSY;
- if ((mode == 1) && (dwLength >= wPacketSize)) {
- configure_channel(pChannel, wPacketSize, 1, dma_addr,
+ if ((mode == 1) && (dwLength >= packet_sz)) {
+ configure_channel(pChannel, packet_sz, 1, dma_addr,
dwLength);
} else
- configure_channel(pChannel, wPacketSize, 0, dma_addr,
+ configure_channel(pChannel, packet_sz, 0, dma_addr,
dwLength);
return TRUE;