[ARM] MXC: do not include mach/hardware.h from mach/memory.h

Instead of including other header files, define PHYS_OFFSET directly

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

diff --git a/arch/arm/mach-mx3/clock.c b/arch/arm/mach-mx3/clock.c
index 9f14a871ee7c5f40c53cfd050ba7e50d7350372a..b1746aae1f89eaeaf1eb2fb7a79037b02da4c1bd 100644 (file)
--- a/arch/arm/mach-mx3/clock.c
+++ b/arch/arm/mach-mx3/clock.c
@@ -24,6 +24,7 @@
 #include <linux/err.h>
 #include <linux/io.h>
 #include <mach/clock.h>
+#include <mach/hardware.h>
 #include <asm/div64.h>
 
 #include "crm_regs.h"

diff --git a/arch/arm/plat-mxc/include/mach/entry-macro.S b/arch/arm/plat-mxc/include/mach/entry-macro.S
index 11632028f7d1ba6f44610c373b52b2721ea81cf4..5f01d60da8457920e2db1208f6c249f5ef826412 100644 (file)
--- a/arch/arm/plat-mxc/include/mach/entry-macro.S
+++ b/arch/arm/plat-mxc/include/mach/entry-macro.S
@@ -9,6 +9,8 @@
  * published by the Free Software Foundation.
  */
 
+#include <mach/hardware.h>
+
 #define AVIC_NIMASK    0x04
 
        @ this macro disables fast irq (not implemented)

diff --git a/arch/arm/plat-mxc/include/mach/io.h b/arch/arm/plat-mxc/include/mach/io.h
index c0cb267e74037c7145563b7be7a8bc2dd91d2377..b4f2de7694667a9c81158ddedb92f8eda351ed18 100644 (file)
--- a/arch/arm/plat-mxc/include/mach/io.h
+++ b/arch/arm/plat-mxc/include/mach/io.h
@@ -25,8 +25,8 @@ __mx3_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
                /* Access all peripherals below 0x80000000 as nonshared device
                 * but leave l2cc alone.
                 */
-               if ((phys_addr < 0x80000000) && ((phys_addr < L2CC_BASE_ADDR) ||
-                       (phys_addr >= L2CC_BASE_ADDR + L2CC_SIZE)))
+               if ((phys_addr < 0x80000000) && ((phys_addr < 0x30000000) ||
+                       (phys_addr >= 0x30000000 + SZ_1M)))
                        mtype = MT_DEVICE_NONSHARED;
        }
 

diff --git a/arch/arm/plat-mxc/include/mach/memory.h b/arch/arm/plat-mxc/include/mach/memory.h
index 203688e6164e05d90474150dd5b460cf9c8cbc60..0b808399097fe25459334f037c185e8b62e86d5f 100644 (file)
--- a/arch/arm/plat-mxc/include/mach/memory.h
+++ b/arch/arm/plat-mxc/include/mach/memory.h
@@ -11,6 +11,12 @@
 #ifndef __ASM_ARCH_MXC_MEMORY_H__
 #define __ASM_ARCH_MXC_MEMORY_H__
 
-#include <mach/hardware.h>
+#if defined CONFIG_ARCH_MX1
+#define PHYS_OFFSET            UL(0x08000000)
+#elif defined CONFIG_ARCH_MX2
+#define PHYS_OFFSET            UL(0xA0000000)
+#elif defined CONFIG_ARCH_MX3
+#define PHYS_OFFSET            UL(0x80000000)
+#endif
 
 #endif /* __ASM_ARCH_MXC_MEMORY_H__ */

diff --git a/arch/arm/plat-mxc/include/mach/mx1.h b/arch/arm/plat-mxc/include/mach/mx1.h
index 8476a15dbfc05122ba2198294253896fb22e95d3..b92e02324d8e02cb410ddb37db3c3fc4bcb3b2f4 100644 (file)
--- a/arch/arm/plat-mxc/include/mach/mx1.h
+++ b/arch/arm/plat-mxc/include/mach/mx1.h
@@ -18,8 +18,6 @@
 
 #include <mach/vmalloc.h>
 
-#define PHYS_OFFSET    UL(0x08000000)
-
 /*
  * Memory map
  */

diff --git a/arch/arm/plat-mxc/include/mach/mx27.h b/arch/arm/plat-mxc/include/mach/mx27.h
index ae8637471ae8c38ac7d31aa25fe5aef794da27dc..0313be72055211bed96a7578225b75faa9212309 100644 (file)
--- a/arch/arm/plat-mxc/include/mach/mx27.h
+++ b/arch/arm/plat-mxc/include/mach/mx27.h
@@ -289,7 +289,4 @@ extern int mx27_revision(void);
 /* this CPU supports up to 192 GPIOs (don't forget the baseboard!) */
 #define ARCH_NR_GPIOS          (192 + 16)
 
-/* Start of RAM */
-#define PHYS_OFFSET            SDRAM_BASE_ADDR
-
 #endif /* __ASM_ARCH_MXC_MX27_H__ */

diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/plat-mxc/include/mach/mx31.h
index 2f6d9fc0ab23dba862d50d81d5c1b4571db49b18..de026654b00e66c3c54d18c1f8f77ed6e3dcc62d 100644 (file)
--- a/arch/arm/plat-mxc/include/mach/mx31.h
+++ b/arch/arm/plat-mxc/include/mach/mx31.h
@@ -239,9 +239,6 @@
 #define PCMCIA_IO_ADDRESS(x) \
        (((x) - X_MEMC_BASE_ADDR) + X_MEMC_BASE_ADDR_VIRT)
 
-/* Start of physical RAM - On many MX31 platforms, this is the first SDRAM bank (CSD0) */
-#define PHYS_OFFSET             CSD0_BASE_ADDR
-
 /*
  * Interrupt numbers
  */

diff --git a/arch/arm/plat-mxc/irq.c b/arch/arm/plat-mxc/irq.c
index 06862654a89a12b23aeb55e142bc7ef804e4edae..6e7578a3514bf6792e2d5a4e78c945279e5b5fd7 100644 (file)
--- a/arch/arm/plat-mxc/irq.c
+++ b/arch/arm/plat-mxc/irq.c
@@ -22,6 +22,7 @@
 #include <linux/io.h>
 #include <mach/common.h>
 #include <asm/mach/irq.h>
+#include <mach/hardware.h>
 
 #define AVIC_BASE              IO_ADDRESS(AVIC_BASE_ADDR)
 #define AVIC_INTCNTL           (AVIC_BASE + 0x00)      /* int control reg */