]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
RealView: Base support for the PB1176 platform
authorBahadir Balban <bahadir.balban@arm.com>
Fri, 18 Apr 2008 21:43:15 +0000 (22:43 +0100)
committerCatalin Marinas <catalin.marinas@arm.com>
Fri, 18 Apr 2008 21:43:15 +0000 (22:43 +0100)
This patch adds the base files for the PB1176 platform support.

Signed-off-by: Bahadir Balban <bahadir.balban@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
arch/arm/mach-realview/realview_pb1176.c [new file with mode: 0644]
include/asm-arm/arch-realview/board-pb1176.h [new file with mode: 0644]
include/asm-arm/arch-realview/irqs.h

diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
new file mode 100644 (file)
index 0000000..4e67310
--- /dev/null
@@ -0,0 +1,290 @@
+/*
+ *  linux/arch/arm/mach-realview/realview_pb1176.c
+ *
+ *  Copyright (C) 2008 ARM Limited
+ *  Copyright (C) 2000 Deep Blue Solutions Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/sysdev.h>
+#include <linux/amba/bus.h>
+
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/leds.h>
+#include <asm/mach-types.h>
+#include <asm/hardware/gic.h>
+#include <asm/hardware/icst307.h>
+#include <asm/hardware/cache-l2x0.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/flash.h>
+#include <asm/mach/map.h>
+#include <asm/mach/mmc.h>
+#include <asm/mach/time.h>
+
+#include <asm/arch/board-pb1176.h>
+#include <asm/arch/irqs.h>
+
+#include "core.h"
+#include "clock.h"
+
+static struct map_desc realview_pb1176_io_desc[] __initdata = {
+       {
+               .virtual        = IO_ADDRESS(REALVIEW_SYS_BASE),
+               .pfn            = __phys_to_pfn(REALVIEW_SYS_BASE),
+               .length         = SZ_4K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = IO_ADDRESS(REALVIEW_PB1176_GIC_CPU_BASE),
+               .pfn            = __phys_to_pfn(REALVIEW_PB1176_GIC_CPU_BASE),
+               .length         = SZ_4K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = IO_ADDRESS(REALVIEW_PB1176_GIC_DIST_BASE),
+               .pfn            = __phys_to_pfn(REALVIEW_PB1176_GIC_DIST_BASE),
+               .length         = SZ_4K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = IO_ADDRESS(REALVIEW_DC1176_GIC_CPU_BASE),
+               .pfn            = __phys_to_pfn(REALVIEW_DC1176_GIC_CPU_BASE),
+               .length         = SZ_4K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = IO_ADDRESS(REALVIEW_DC1176_GIC_DIST_BASE),
+               .pfn            = __phys_to_pfn(REALVIEW_DC1176_GIC_DIST_BASE),
+               .length         = SZ_4K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = IO_ADDRESS(REALVIEW_SCTL_BASE),
+               .pfn            = __phys_to_pfn(REALVIEW_SCTL_BASE),
+               .length         = SZ_4K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = IO_ADDRESS(REALVIEW_PB1176_TIMER0_1_BASE),
+               .pfn            = __phys_to_pfn(REALVIEW_PB1176_TIMER0_1_BASE),
+               .length         = SZ_4K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = IO_ADDRESS(REALVIEW_PB1176_TIMER2_3_BASE),
+               .pfn            = __phys_to_pfn(REALVIEW_PB1176_TIMER2_3_BASE),
+               .length         = SZ_4K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = IO_ADDRESS(REALVIEW_PB1176_L220_BASE),
+               .pfn            = __phys_to_pfn(REALVIEW_PB1176_L220_BASE),
+               .length         = SZ_8K,
+               .type           = MT_DEVICE,
+       },
+#ifdef CONFIG_DEBUG_LL
+       {
+               .virtual        = IO_ADDRESS(REALVIEW_PB1176_UART0_BASE),
+               .pfn            = __phys_to_pfn(REALVIEW_PB1176_UART0_BASE),
+               .length         = SZ_4K,
+               .type           = MT_DEVICE,
+       },
+#endif
+};
+
+static void __init realview_pb1176_map_io(void)
+{
+       iotable_init(realview_pb1176_io_desc, ARRAY_SIZE(realview_pb1176_io_desc));
+}
+
+/*
+ * RealView PB1176 AMBA devices
+ */
+#define GPIO2_IRQ      { IRQ_PB1176_GPIO2, NO_IRQ }
+#define GPIO2_DMA      { 0, 0 }
+#define GPIO3_IRQ      { IRQ_PB1176_GPIO3, NO_IRQ }
+#define GPIO3_DMA      { 0, 0 }
+#define AACI_IRQ       { IRQ_PB1176_AACI, NO_IRQ }
+#define AACI_DMA       { 0x80, 0x81 }
+#define MMCI0_IRQ      { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B }
+#define MMCI0_DMA      { 0x84, 0 }
+#define KMI0_IRQ       { IRQ_PB1176_KMI0, NO_IRQ }
+#define KMI0_DMA       { 0, 0 }
+#define KMI1_IRQ       { IRQ_PB1176_KMI1, NO_IRQ }
+#define KMI1_DMA       { 0, 0 }
+#define PB1176_SMC_IRQ { NO_IRQ, NO_IRQ }
+#define PB1176_SMC_DMA { 0, 0 }
+#define MPMC_IRQ       { NO_IRQ, NO_IRQ }
+#define MPMC_DMA       { 0, 0 }
+#define PB1176_CLCD_IRQ        { IRQ_DC1176_CLCD, NO_IRQ }
+#define PB1176_CLCD_DMA        { 0, 0 }
+#define DMAC_IRQ       { IRQ_PB1176_DMAC, NO_IRQ }
+#define DMAC_DMA       { 0, 0 }
+#define SCTL_IRQ       { NO_IRQ, NO_IRQ }
+#define SCTL_DMA       { 0, 0 }
+#define PB1176_WATCHDOG_IRQ    { IRQ_DC1176_WATCHDOG, NO_IRQ }
+#define PB1176_WATCHDOG_DMA    { 0, 0 }
+#define PB1176_GPIO0_IRQ       { IRQ_PB1176_GPIO0, NO_IRQ }
+#define PB1176_GPIO0_DMA       { 0, 0 }
+#define GPIO1_IRQ      { IRQ_PB1176_GPIO1, NO_IRQ }
+#define GPIO1_DMA      { 0, 0 }
+#define PB1176_RTC_IRQ { IRQ_DC1176_RTC, NO_IRQ }
+#define PB1176_RTC_DMA { 0, 0 }
+#define SCI_IRQ                { IRQ_PB1176_SCI, NO_IRQ }
+#define SCI_DMA                { 7, 6 }
+#define PB1176_UART0_IRQ       { IRQ_DC1176_UART0, NO_IRQ }
+#define PB1176_UART0_DMA       { 15, 14 }
+#define PB1176_UART1_IRQ       { IRQ_DC1176_UART1, NO_IRQ }
+#define PB1176_UART1_DMA       { 13, 12 }
+#define PB1176_UART2_IRQ       { IRQ_DC1176_UART2, NO_IRQ }
+#define PB1176_UART2_DMA       { 11, 10 }
+#define PB1176_UART3_IRQ       { IRQ_DC1176_UART3, NO_IRQ }
+#define PB1176_UART3_DMA       { 0x86, 0x87 }
+#define PB1176_SSP_IRQ         { IRQ_PB1176_SSP, NO_IRQ }
+#define PB1176_SSP_DMA         { 9, 8 }
+
+/* FPGA Primecells */
+AMBA_DEVICE(aaci,      "fpga:04",      AACI,           NULL);
+AMBA_DEVICE(mmc0,      "fpga:05",      MMCI0,          &realview_mmc0_plat_data);
+AMBA_DEVICE(kmi0,      "fpga:06",      KMI0,           NULL);
+AMBA_DEVICE(kmi1,      "fpga:07",      KMI1,           NULL);
+AMBA_DEVICE(uart3,     "fpga:09",      PB1176_UART3,   NULL);
+
+/* DevChip Primecells */
+AMBA_DEVICE(smc,       "dev:00",       PB1176_SMC,     NULL);
+AMBA_DEVICE(sctl,      "dev:e0",       SCTL,           NULL);
+AMBA_DEVICE(wdog,      "dev:e1",       PB1176_WATCHDOG,        NULL);
+AMBA_DEVICE(gpio0,     "dev:e4",       PB1176_GPIO0,   NULL);
+AMBA_DEVICE(gpio1,     "dev:e5",       GPIO1,          NULL);
+AMBA_DEVICE(gpio2,     "dev:e6",       GPIO2,          NULL);
+AMBA_DEVICE(rtc,       "dev:e8",       PB1176_RTC,     NULL);
+AMBA_DEVICE(sci0,      "dev:f0",       SCI,            NULL);
+AMBA_DEVICE(uart0,     "dev:f1",       PB1176_UART0,   NULL);
+AMBA_DEVICE(uart1,     "dev:f2",       PB1176_UART1,   NULL);
+AMBA_DEVICE(uart2,     "dev:f3",       PB1176_UART2,   NULL);
+AMBA_DEVICE(ssp0,      "dev:f4",       PB1176_SSP,     NULL);
+
+/* Primecells on the NEC ISSP chip */
+AMBA_DEVICE(clcd,      "issp:20",      PB1176_CLCD,    &clcd_plat_data);
+//AMBA_DEVICE(dmac,    "issp:30",      PB1176_DMAC,    NULL);
+
+static struct amba_device *amba_devs[] __initdata = {
+//     &dmac_device,
+       &uart0_device,
+       &uart1_device,
+       &uart2_device,
+       &uart3_device,
+       &smc_device,
+       &clcd_device,
+       &sctl_device,
+       &wdog_device,
+       &gpio0_device,
+       &gpio1_device,
+       &gpio2_device,
+       &rtc_device,
+       &sci0_device,
+       &ssp0_device,
+       &aaci_device,
+       &mmc0_device,
+       &kmi0_device,
+       &kmi1_device,
+};
+
+/*
+ * RealView PB1176 platform devices
+ */
+static struct resource realview_pb1176_flash_resource = {
+       .start                  = REALVIEW_PB1176_FLASH_BASE,
+       .end                    = REALVIEW_PB1176_FLASH_BASE + REALVIEW_PB1176_FLASH_SIZE - 1,
+       .flags                  = IORESOURCE_MEM,
+};
+
+static struct resource realview_pb1176_smsc911x_resources[] = {
+       [0] = {
+               .start          = REALVIEW_PB1176_ETH_BASE,
+               .end            = REALVIEW_PB1176_ETH_BASE + SZ_64K - 1,
+               .flags          = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start          = IRQ_PB1176_ETH,
+               .end            = IRQ_PB1176_ETH,
+               .flags          = IORESOURCE_IRQ,
+       },
+};
+
+static struct platform_device realview_pb1176_smsc911x_device = {
+       .name           = "smc911x",
+       .id             = 0,
+       .num_resources  = ARRAY_SIZE(realview_pb1176_smsc911x_resources),
+       .resource       = realview_pb1176_smsc911x_resources,
+};
+
+static void __init gic_init_irq(void)
+{
+       /* ARM1176 DevChip GIC, primary */
+       gic_cpu_base_addr = __io_address(REALVIEW_DC1176_GIC_CPU_BASE);
+       gic_dist_init(0, __io_address(REALVIEW_DC1176_GIC_DIST_BASE), IRQ_DC1176_GIC_START);
+       gic_cpu_init(0, gic_cpu_base_addr);
+
+       /* board GIC, secondary */
+       gic_dist_init(1, __io_address(REALVIEW_PB1176_GIC_DIST_BASE), IRQ_PB1176_GIC_START);
+       gic_cpu_init(1, __io_address(REALVIEW_PB1176_GIC_CPU_BASE));
+       gic_cascade_irq(1, IRQ_DC1176_PB_IRQ1);
+}
+
+static void __init realview_pb1176_timer_init(void)
+{
+       timer0_va_base = __io_address(REALVIEW_PB1176_TIMER0_1_BASE);
+       timer1_va_base = __io_address(REALVIEW_PB1176_TIMER0_1_BASE) + 0x20;
+       timer2_va_base = __io_address(REALVIEW_PB1176_TIMER2_3_BASE);
+       timer3_va_base = __io_address(REALVIEW_PB1176_TIMER2_3_BASE) + 0x20;
+
+       realview_timer_init(IRQ_DC1176_TIMER0);
+}
+
+static struct sys_timer realview_pb1176_timer = {
+       .init           = realview_pb1176_timer_init,
+};
+
+static void __init realview_pb1176_init(void)
+{
+       int i;
+
+       /* 128Kb (16Kb/way) 8-way associativity. evmon/parity/share enabled. */
+       l2x0_init(__io_address(REALVIEW_PB1176_L220_BASE), 0x00730000, 0xfe000fff);
+
+       clk_register(&realview_clcd_clk);
+
+       realview_flash_register(&realview_pb1176_flash_resource, 1);
+       platform_device_register(&realview_pb1176_smsc911x_device);
+
+       for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
+               struct amba_device *d = amba_devs[i];
+               amba_device_register(d, &iomem_resource);
+       }
+
+#ifdef CONFIG_LEDS
+       leds_event = realview_leds_event;
+#endif
+}
+
+MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
+       /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
+       .phys_io        = REALVIEW_PB1176_UART0_BASE,
+       .io_pg_offst    = (IO_ADDRESS(REALVIEW_PB1176_UART0_BASE) >> 18) & 0xfffc,
+       .boot_params    = 0x00000100,
+       .map_io         = realview_pb1176_map_io,
+       .init_irq       = gic_init_irq,
+       .timer          = &realview_pb1176_timer,
+       .init_machine   = realview_pb1176_init,
+MACHINE_END
diff --git a/include/asm-arm/arch-realview/board-pb1176.h b/include/asm-arm/arch-realview/board-pb1176.h
new file mode 100644 (file)
index 0000000..48ce9c8
--- /dev/null
@@ -0,0 +1,152 @@
+/*
+ * include/asm-arm/arch-realview/board-pb1176.h
+ *
+ * Copyright (C) 2008 ARM Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ */
+
+#ifndef __ASM_ARCH_BOARD_PB1176_H
+#define __ASM_ARCH_BOARD_PB1176_H
+
+#include <asm/arch/platform.h>
+
+/*
+ * Peripheral addresses
+ */
+#define REALVIEW_PB1176_SCTL_BASE              0x10100000 /* System controller */
+#define REALVIEW_PB1176_SMC_BASE               0x10111000 /* SMC */
+#define REALVIEW_PB1176_DMC_BASE               0x10109000 /* DMC configuration */
+#define REALVIEW_PB1176_SDRAM67_BASE           0x70000000 /* SDRAM banks 6 and 7 */
+#define REALVIEW_PB1176_FLASH_BASE             0x30000000
+#define REALVIEW_PB1176_FLASH_SIZE             SZ_64M
+
+#define REALVIEW_PB1176_TIMER0_1_BASE          0x10104000 /* Timer 0 and 1 */
+#define REALVIEW_PB1176_TIMER2_3_BASE          0x10105000 /* Timer 2 and 3 */
+#define REALVIEW_PB1176_TIMER4_5_BASE          0x10106000 /* Timer 4 and 5 */
+#define REALVIEW_PB1176_WATCHDOG_BASE          0x10107000 /* watchdog interface */
+#define REALVIEW_PB1176_RTC_BASE               0x10108000 /* Real Time Clock */
+#define REALVIEW_PB1176_GPIO0_BASE             0x1010A000 /* GPIO port 0 */
+#define REALVIEW_PB1176_SSP_BASE               0x1010B000 /* Synchronous Serial Port */
+#define REALVIEW_PB1176_UART0_BASE             0x1010C000 /* UART 0 */
+#define REALVIEW_PB1176_UART1_BASE             0x1010D000 /* UART 1 */
+#define REALVIEW_PB1176_UART2_BASE             0x1010E000 /* UART 2 */
+#define REALVIEW_PB1176_UART3_BASE             0x1010F000 /* UART 3 */
+#define REALVIEW_PB1176_CLCD_BASE              0x10112000 /* CLCD */
+#define REALVIEW_PB1176_ETH_BASE               0x3A000000 /* Ethernet */
+#define REALVIEW_PB1176_USB_BASE               0x3B000000 /* USB */
+
+/*
+ * PCI regions
+ */
+#define REALVIEW_PB1176_PCI_BASE               0x60000000 /* PCI self config */
+#define REALVIEW_PB1176_PCI_CFG_BASE           0x61000000 /* PCI config */
+#define REALVIEW_PB1176_PCI_IO_BASE0           0x62000000 /* PCI IO region */
+#define REALVIEW_PB1176_PCI_MEM_BASE0          0x63000000 /* Memory region 1 */
+#define REALVIEW_PB1176_PCI_MEM_BASE1          0x64000000 /* Memory region 2 */
+#define REALVIEW_PB1176_PCI_MEM_BASE2          0x68000000 /* Memory region 3 */
+
+#define REALVIEW_PB1176_PCI_BASE_SIZE          0x01000000 /* 16MB */
+#define REALVIEW_PB1176_PCI_CFG_BASE_SIZE      0x01000000 /* 16MB */
+#define REALVIEW_PB1176_PCI_IO_BASE0_SIZE      0x01000000 /* 16MB */
+#define REALVIEW_PB1176_PCI_MEM_BASE0_SIZE     0x01000000 /* 16MB */
+#define REALVIEW_PB1176_PCI_MEM_BASE1_SIZE     0x04000000 /* 64MB */
+#define REALVIEW_PB1176_PCI_MEM_BASE2_SIZE     0x08000000 /* 128MB */
+
+#define REALVIEW_DC1176_GIC_CPU_BASE           0x10120000 /* GIC CPU interface, on devchip */
+#define REALVIEW_DC1176_GIC_DIST_BASE          0x10121000 /* GIC distributor, on devchip */
+#define REALVIEW_PB1176_GIC_CPU_BASE           0x10040000 /* GIC CPU interface, on FPGA */
+#define REALVIEW_PB1176_GIC_DIST_BASE          0x10041000 /* GIC distributor, on FPGA */
+#define REALVIEW_PB1176_L220_BASE              0x10110000 /* L220 registers */
+
+/*
+ * Irqs
+ */
+#define IRQ_DC1176_GIC_START                   32
+#define IRQ_PB1176_GIC_START                   64
+
+/*
+ * ARM1176 DevChip interrupt sources (primary GIC)
+ */
+#define IRQ_DC1176_WATCHDOG    (IRQ_DC1176_GIC_START + 0)      /* Watchdog timer */
+#define IRQ_DC1176_SOFTINT     (IRQ_DC1176_GIC_START + 1)      /* Software interrupt */
+#define IRQ_DC1176_COMMRx      (IRQ_DC1176_GIC_START + 2)      /* Debug Comm Rx interrupt */
+#define IRQ_DC1176_COMMTx      (IRQ_DC1176_GIC_START + 3)      /* Debug Comm Tx interrupt */
+#define IRQ_DC1176_TIMER0      (IRQ_DC1176_GIC_START + 8)      /* Timer 0 */
+#define IRQ_DC1176_TIMER1      (IRQ_DC1176_GIC_START + 9)      /* Timer 1 */
+#define IRQ_DC1176_TIMER2      (IRQ_DC1176_GIC_START + 10)     /* Timer 2 */
+#define IRQ_DC1176_APC         (IRQ_DC1176_GIC_START + 11)
+#define IRQ_DC1176_IEC         (IRQ_DC1176_GIC_START + 12)
+#define IRQ_DC1176_L2CC                (IRQ_DC1176_GIC_START + 13)
+#define IRQ_DC1176_RTC         (IRQ_DC1176_GIC_START + 14)
+#define IRQ_DC1176_CLCD                (IRQ_DC1176_GIC_START + 15)     /* CLCD controller */
+#define IRQ_DC1176_UART0       (IRQ_DC1176_GIC_START + 18)     /* UART 0 on development chip */
+#define IRQ_DC1176_UART1       (IRQ_DC1176_GIC_START + 19)     /* UART 1 on development chip */
+#define IRQ_DC1176_UART2       (IRQ_DC1176_GIC_START + 20)     /* UART 2 on development chip */
+#define IRQ_DC1176_UART3       (IRQ_DC1176_GIC_START + 21)     /* UART 3 on development chip */
+
+#define IRQ_DC1176_PB_IRQ2     (IRQ_DC1176_GIC_START + 30)     /* tile GIC */
+#define IRQ_DC1176_PB_IRQ1     (IRQ_DC1176_GIC_START + 31)     /* main GIC */
+
+/*
+ * RealView PB1176 interrupt sources (secondary GIC)
+ */
+#define IRQ_PB1176_MMCI0A      (IRQ_PB1176_GIC_START + 1)      /* Multimedia Card 0A */
+#define IRQ_PB1176_MMCI0B      (IRQ_PB1176_GIC_START + 2)      /* Multimedia Card 0A */
+#define IRQ_PB1176_KMI0                (IRQ_PB1176_GIC_START + 3)      /* Keyboard/Mouse port 0 */
+#define IRQ_PB1176_KMI1                (IRQ_PB1176_GIC_START + 4)      /* Keyboard/Mouse port 1 */
+#define IRQ_PB1176_SCI         (IRQ_PB1176_GIC_START + 5)
+#define IRQ_PB1176_UART4       (IRQ_PB1176_GIC_START + 6)      /* UART 4 on baseboard */
+#define IRQ_PB1176_CHARLCD     (IRQ_PB1176_GIC_START + 7)      /* Character LCD */
+#define IRQ_PB1176_GPIO1       (IRQ_PB1176_GIC_START + 8)
+#define IRQ_PB1176_GPIO2       (IRQ_PB1176_GIC_START + 9)
+#define IRQ_PB1176_ETH         (IRQ_PB1176_GIC_START + 10)     /* Ethernet controller */
+#define IRQ_PB1176_USB         (IRQ_PB1176_GIC_START + 11)     /* USB controller */
+
+#define IRQ_PB1176_PISMO       (IRQ_PB1176_GIC_START + 16)
+
+#define IRQ_PB1176_AACI                (IRQ_PB1176_GIC_START + 19)     /* Audio Codec */
+
+#define IRQ_PB1176_TIMER0_1    (IRQ_PB1176_GIC_START + 22)
+#define IRQ_PB1176_TIMER2_3    (IRQ_PB1176_GIC_START + 23)
+#define IRQ_PB1176_DMAC                (IRQ_PB1176_GIC_START + 24)     /* DMA controller */
+#define IRQ_PB1176_RTC         (IRQ_PB1176_GIC_START + 25)     /* Real Time Clock */
+
+#define IRQ_PB1176_GPIO0       -1
+#define IRQ_PB1176_SSP         -1
+#define IRQ_PB1176_SCTL                -1
+
+#define NR_GIC_PB1176          2
+
+/*
+ * Only define NR_IRQS if less than NR_IRQS_PB1176
+ */
+#define NR_IRQS_PB1176         (IRQ_DC1176_GIC_START + 96)
+
+#if defined(CONFIG_MACH_REALVIEW_PB1176)
+
+#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PB1176)
+#undef NR_IRQS
+#define NR_IRQS                        NR_IRQS_PB1176
+#endif
+
+#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PB1176)
+#undef MAX_GIC_NR
+#define MAX_GIC_NR             NR_GIC_PB1176
+#endif
+
+#endif /* CONFIG_MACH_REALVIEW_PB1176 */
+
+#endif /* __ASM_ARCH_BOARD_PB1176_H */
index 15e7751043929d4adeedefeacf86bac0d813f4bc..ccbac59235c6634a260df0bf3e7695697e0c815b 100644 (file)
@@ -24,6 +24,7 @@
 
 #include <asm/arch/board-eb.h>
 #include <asm/arch/board-pb11mp.h>
+#include <asm/arch/board-pb1176.h>
 
 #define IRQ_LOCALTIMER         29
 #define IRQ_LOCALWDOG          30