OMAP3 clock: add wait for USIM module to become active

This patch adds the register definitions and clock tree fields required
to wait for the USIM module to come out of idle when the USIM clocks are
enabled.  Register bit definitions are from the 34xx HS Addendum Rev B.
There, the clock is in fact named "USIM_ICLK".

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index 3e51461aa23d41e2a1592ce77b1291aebd0b521c..857c059d3050348f7bc418239e750ad842cd6030 100644 (file)
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -2488,10 +2488,11 @@ static struct clk usim_fck = {
        .init           = &omap2_init_clksel_parent,
        .enable_reg     = CM_FCLKEN,
        .enable_bit     = OMAP3430ES2_EN_USIMOCP_SHIFT,
+       .idlest_bit     = OMAP3430ES2_ST_USIMOCP_SHIFT,
        .clksel_reg     = CM_CLKSEL,
        .clksel_mask    = OMAP3430ES2_CLKSEL_USIMOCP_MASK,
        .clksel         = usim_clksel,
-       .flags          = CLOCK_IN_OMAP3430ES2,
+       .flags          = CLOCK_IN_OMAP3430ES2 | WAIT_READY,
        .clkdm          = { .name = "prm_clkdm" },
        .recalc         = &omap2_clksel_recalc,
 };
@@ -2552,15 +2553,14 @@ static struct clk wkup_l4_ick = {
        .recalc         = &followparent_recalc,
 };
 
-/* 3430ES2 only */
-/* Never specifically named in the TRM, so we have to infer a likely name */
 static struct clk usim_ick = {
        .name           = "usim_ick",
        .parent         = &wkup_l4_ick,
        .prcm_mod       = WKUP_MOD,
        .enable_reg     = CM_ICLKEN,
        .enable_bit     = OMAP3430ES2_EN_USIMOCP_SHIFT,
-       .flags          = CLOCK_IN_OMAP3430ES2,
+       .idlest_bit     = OMAP3430ES2_ST_USIMOCP_SHIFT,
+       .flags          = CLOCK_IN_OMAP3430ES2 | WAIT_READY,
        .clkdm          = { .name = "prm_clkdm" },
        .recalc         = &followparent_recalc,
 };

diff --git a/arch/arm/mach-omap2/cm-regbits-34xx.h b/arch/arm/mach-omap2/cm-regbits-34xx.h
index 5242ce98adcdf19d33934f3000293917e670a28c..6f3f5a36aae664960e037d59200dba8fe025feab 100644 (file)
--- a/arch/arm/mach-omap2/cm-regbits-34xx.h
+++ b/arch/arm/mach-omap2/cm-regbits-34xx.h
@@ -383,6 +383,7 @@
 
 /* CM_FCLKEN_WKUP specific bits */
 #define OMAP3430ES2_EN_USIMOCP_SHIFT                   9
+#define OMAP3430ES2_EN_USIMOCP_MASK                    (1 << 9)
 
 /* CM_ICLKEN_WKUP specific bits */
 #define OMAP3430_EN_WDT1                               (1 << 4)
@@ -391,6 +392,8 @@
 #define OMAP3430_EN_32KSYNC_SHIFT                      2
 
 /* CM_IDLEST_WKUP specific bits */
+#define OMAP3430ES2_ST_USIMOCP_SHIFT                   9
+#define OMAP3430ES2_ST_USIMOCP_MASK                    (1 << 9)
 #define OMAP3430_ST_WDT2_SHIFT                         5
 #define OMAP3430_ST_WDT2_MASK                          (1 << 5)
 #define OMAP3430_ST_WDT1_SHIFT                         4
@@ -399,6 +402,8 @@
 #define OMAP3430_ST_32KSYNC_MASK                       (1 << 2)
 
 /* CM_AUTOIDLE_WKUP */
+#define OMAP3430ES2_AUTO_USIMOCP                               (1 << 9)
+#define OMAP3430ES2_AUTO_USIMOCP_SHIFT                 9
 #define OMAP3430_AUTO_WDT2                             (1 << 5)
 #define OMAP3430_AUTO_WDT2_SHIFT                       5
 #define OMAP3430_AUTO_WDT1                             (1 << 4)
@@ -463,6 +468,8 @@
 #define OMAP3430_ST_CORE_CLK_MASK                      (1 << 0)
 
 /* CM_IDLEST2_CKGEN */
+#define OMAP3430ES2_ST_USIM_CLK_SHIFT                  2
+#define OMAP3430ES2_ST_USIM_CLK_MASK                   (1 << 2)
 #define OMAP3430ES2_ST_120M_CLK_SHIFT                  1
 #define OMAP3430ES2_ST_120M_CLK_MASK                   (1 << 1)
 #define OMAP3430ES2_ST_PERIPH2_CLK_SHIFT               0