MUX_CFG("P15_1610_UWIRE_CS3", 8, 12, 1, 1, 22, 0, 1, 1, 1)
MUX_CFG("N15_1610_UWIRE_CS1", 7, 18, 2, 1, 14, 0, NA, 0, 1)
+/* OMAP-1510 uWire */
+MUX_CFG("P15_1510_UWIRE_CS3", 8, 12, 1, NA, 0, 0, NA, 0, 1)
+MUX_CFG("N14_1510_UWIRE_CS0", 8, 9, 1, NA, 0, 0, NA, 0, 1)
+MUX_CFG("V19_1510_UWIRE_SCLK", 8, 6, 0, NA, 0, 0, NA, 0, 1)
+MUX_CFG("W21_1510_UWIRE_SDO", 8, 3, 0, NA, 0, 0, NA, 0, 1)
+MUX_CFG("U18_1510_UWIRE_SDI", 8, 0, 0, 1, 18, 0, NA, 0, 1)
+
/* OMAP-1610 Flash */
MUX_CFG("L3_1610_FLASH_CS2B_OE",10, 6, 1, NA, 0, 0, NA, 0, 1)
MUX_CFG("M8_1610_FLASH_CS2B_WE",10, 3, 1, NA, 0, 0, NA, 0, 1)
MUX_CFG("T20_1610_LOW_PWR", 7, 12, 1, NA, 0, 0, NA, 0, 0)
/* MCLK Settings */
+MUX_CFG("R10_1510_MCLK_ON", B, 18, 0, 2, 22, 1, NA, 1, 1)
MUX_CFG("V5_1710_MCLK_ON", B, 15, 0, NA, 0, 0, NA, 0, 0)
MUX_CFG("V5_1710_MCLK_OFF", B, 15, 6, NA, 0, 0, NA, 0, 0)
MUX_CFG("R10_1610_MCLK_ON", B, 18, 0, NA, 22, 0, NA, 1, 0)
#include <asm/arch/hardware.h>
#include <asm/hardware/tsc2101.h>
#include <asm/arch/gpioexpander.h>
+#include <asm/arch/gpio.h>
#include "omap-tsc2101.h"
-#if CONFIG_ARCH_OMAP16XX
+#if CONFIG_ARCH_OMAP1
#include <../drivers/ssi/omap-uwire.h>
#else
#error "Unsupported configuration"
if (count++ == 0) {
int ret = 0;
/* set the Mux to provide MCLK to TSC2101 */
- if (machine_is_omap_h3()) {
+ if (machine_is_omap_h3())
ret = omap_cfg_reg(V5_1710_MCLK_ON);
- } else {
- if (machine_is_omap_h2()) {
- ret = omap_cfg_reg(R10_1610_MCLK_ON);
+ else if (machine_is_omap_h2())
+ ret = omap_cfg_reg(R10_1610_MCLK_ON);
+ else if (machine_is_omap_h6300())
+ ret = omap_cfg_reg(R10_1510_MCLK_ON);
+
+ if (!cpu_is_omap1510 ()) {
+ /* Get the MCLK */
+ tsc2101_mclk_ck = clk_get(NULL, "mclk");
+ if (NULL == tsc2101_mclk_ck) {
+ printk(KERN_ERR "Unable to get the clock MCLK!!!\n");;
+ ret = -EPERM;
+ goto done;
}
- }
-
- /* Get the MCLK */
- tsc2101_mclk_ck = clk_get(NULL, "mclk");
- if (NULL == tsc2101_mclk_ck) {
- printk(KERN_ERR "Unable to get the clock MCLK!!!\n");;
- ret = -EPERM;
- goto done;
- }
- if (clk_set_rate(tsc2101_mclk_ck, 12000000)) {
- printk(KERN_ERR "Unable to set rate to the MCLK!!!\n");;
- ret = -EPERM;
- goto done;
- }
- clk_enable(tsc2101_mclk_ck);
+ if (clk_set_rate(tsc2101_mclk_ck, 12000000)) {
+ printk(KERN_ERR "Unable to set rate to the MCLK!!!\n");;
+ ret = -EPERM;
+ goto done;
+ }
+ clk_enable(tsc2101_mclk_ck);
+ } /* if (!cpu_is_omap1510 ()) */
ret = omap_tsc2101_configure();
}
}
- /* Release the MCLK */
- clk_disable(tsc2101_mclk_ck);
- clk_put(tsc2101_mclk_ck);
- tsc2101_mclk_ck = NULL;
+ if (!cpu_is_omap1510 ()) {
+ /* Release the MCLK */
+ clk_disable(tsc2101_mclk_ck);
+ clk_put(tsc2101_mclk_ck);
+ tsc2101_mclk_ck = NULL;
+ }
+
+#if defined(CONFIG_MACH_OMAP_H6300)
+ omap_free_gpio(8);
+#endif
module_put(THIS_MODULE);
}
return;
}
}
- if (machine_is_omap_h3()) {
+ if (machine_is_omap_h3() || machine_is_omap_h6300()) {
+
+ if (machine_is_omap_h6300())
+ omap_set_gpio_dataout (8, 0);
ret =
omap_uwire_data_transfer(0, ((page << 11) | (address << 5)),
printk(KERN_ERR
"uwire-write returned error for address %x\n",
address);
+ if (machine_is_omap_h6300())
+ omap_set_gpio_dataout (8, 1);
return;
}
ret = omap_uwire_data_transfer(0, data, 16, 0, NULL, 0);
printk(KERN_ERR
"uwire-write returned error for address %x\n",
address);
+ if (machine_is_omap_h6300())
+ omap_set_gpio_dataout (8, 1);
return;
}
- }
+ if (machine_is_omap_h6300())
+ omap_set_gpio_dataout (8, 1);
+ }
}
void omap_tsc2101_reads(int page, u8 startaddress, u16 * data, int numregs)
if (machine_is_omap_h2()) {
cs = 1;
}
- if (machine_is_omap_h3()) {
+ if (machine_is_omap_h3() || machine_is_omap_h6300()) {
cs = 0;
}
+
+ if (machine_is_omap_h6300())
+ omap_set_gpio_dataout(8, 0);
+
(void)omap_uwire_data_transfer(cs, (0x8000 | (page << 11)
| (startaddress << 5)),
16, 0, NULL, 1);
omap_uwire_data_transfer(cs, 0, 0, 16, data, 1);
}
omap_uwire_data_transfer(cs, 0, 0, 16, data, 0);
+
+ if (machine_is_omap_h6300())
+ omap_set_gpio_dataout(8, 1);
}
u16 omap_tsc2101_read(int page, u8 address)
omap_cfg_reg(N14_1610_UWIRE_CS0);
omap_uwire_configure_mode(0, uwire_flags);
}
+ if (machine_is_omap_h6300()) {
+ uwire_flags = UWIRE_READ_RISING_EDGE | UWIRE_WRITE_RISING_EDGE;
+ omap_cfg_reg(N14_1510_UWIRE_CS0);
+ omap_uwire_configure_mode(0, uwire_flags);
+
+ omap_request_gpio(8);
+ omap_set_gpio_dataout(8, 0);
+ omap_set_gpio_direction (8, 0);
+ }
/* Configure MCLK enable */
- omap_writel(omap_readl(PU_PD_SEL_2) | (1 << 22), PU_PD_SEL_2);
+ if (cpu_is_omap16xx() || cpu_is_omap1710())
+ omap_writel(omap_readl(PU_PD_SEL_2) | (1 << 22), PU_PD_SEL_2);
+ if (machine_is_omap_h6300()) {
+ omap_cfg_reg(V19_1510_UWIRE_SCLK);
+ omap_cfg_reg(W21_1510_UWIRE_SDO);
+ omap_cfg_reg(U18_1510_UWIRE_SDI);
+ }
return 0;
}