]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
h63xx: mux and microwire configurations.
authorMika Laitio <lamikr@pilppa.org>
Mon, 19 Jan 2009 23:02:24 +0000 (01:02 +0200)
committerMika Laitio <lamikr@pilppa.org>
Mon, 19 Jan 2009 23:02:24 +0000 (01:02 +0200)
arch/arm/configs/omap_h63xx_defconfig
arch/arm/mach-omap1/mux.c
drivers/ssi/omap-tsc2101.c
drivers/ssi/omap-uwire.c
include/asm-arm/arch-omap/mux.h

index f9c6aef814c5c0a13e2e799abf8f7b3c7e20bb48..786e2337ddd5aa4d149170fb0646932206dc984a 100644 (file)
@@ -1238,8 +1238,8 @@ CONFIG_MMC_OMAP=y
 #
 # Synchronous Serial Interfaces (SSI)
 #
-# CONFIG_OMAP_UWIRE is not set
-# CONFIG_OMAP_TSC2101 is not set
+CONFIG_OMAP_UWIRE=y
+CONFIG_OMAP_TSC2101=y
 
 #
 # CBUS support
index 10fe0b3efcace593b613aa8e0c036082e83296d1..d4eade5896272c991cee3c0a0294b1ea76b145a7 100644 (file)
@@ -200,6 +200,13 @@ MUX_CFG("N14_1610_UWIRE_CS0",       8,    9,    1,   1,  21,   0,    1,     1,  1)
 MUX_CFG("P15_1610_UWIRE_CS3",   8,   12,    1,   1,  22,   0,    1,     1,  1)
 MUX_CFG("N15_1610_UWIRE_CS1",   7,   18,    2,   1,  14,   0,   NA,     0,  1)
 
+/* OMAP-1510 uWire */
+MUX_CFG("P15_1510_UWIRE_CS3",  8,   12,    1,   NA,   0,   0,  NA,  0,  1)
+MUX_CFG("N14_1510_UWIRE_CS0",  8,    9,    1,   NA,   0,   0,  NA,  0,  1)
+MUX_CFG("V19_1510_UWIRE_SCLK", 8,    6,    0,   NA,   0,   0,  NA,  0,  1)
+MUX_CFG("W21_1510_UWIRE_SDO",  8,    3,    0,   NA,   0,   0,  NA,  0,  1)
+MUX_CFG("U18_1510_UWIRE_SDI",  8,    0,    0,    1,  18,   0,  NA,  0,  1)
+
 /* OMAP-1610 Flash */
 MUX_CFG("L3_1610_FLASH_CS2B_OE",10,    6,    1,         NA,   0,   0,   NA,     0,  1)
 MUX_CFG("M8_1610_FLASH_CS2B_WE",10,    3,    1,         NA,   0,   0,   NA,     0,  1)
@@ -262,6 +269,7 @@ MUX_CFG("N19_1610_KBR5",     6,  12,     1,   1,   2,   1,    1,     1,  0)
 MUX_CFG("T20_1610_LOW_PWR",     7,   12,    1,   NA,   0,   0,   NA,    0,  0)
 
 /* MCLK Settings */
+MUX_CFG("R10_1510_MCLK_ON",     B,   18,    0,   2,   22,   1,   NA,    1,  1)
 MUX_CFG("V5_1710_MCLK_ON",      B,   15,    0,   NA,   0,   0,   NA,    0,  0)
 MUX_CFG("V5_1710_MCLK_OFF",     B,   15,    6,   NA,   0,   0,   NA,    0,  0)
 MUX_CFG("R10_1610_MCLK_ON",     B,   18,    0,   NA,  22,   0,   NA,    1,  0)
index 5dfe994001a094ec21aac422752631ebd3c8b3bb..d95af74513257aeb35117350b4f66b6c8ede7aba 100644 (file)
 #include <asm/arch/hardware.h>
 #include <asm/hardware/tsc2101.h>
 #include <asm/arch/gpioexpander.h>
+#include <asm/arch/gpio.h>
 
 #include "omap-tsc2101.h"
 
-#if CONFIG_ARCH_OMAP16XX
+#if CONFIG_ARCH_OMAP1
 #include <../drivers/ssi/omap-uwire.h>
 #else
 #error "Unsupported configuration"
@@ -66,27 +67,28 @@ int omap_tsc2101_enable(void)
        if (count++ == 0) {
                int ret = 0;
                /* set the Mux to provide MCLK to TSC2101 */
-               if (machine_is_omap_h3()) {
+               if (machine_is_omap_h3())
                        ret = omap_cfg_reg(V5_1710_MCLK_ON);
-               } else {
-                       if (machine_is_omap_h2()) {
-                               ret = omap_cfg_reg(R10_1610_MCLK_ON);
+               else if (machine_is_omap_h2())
+                       ret = omap_cfg_reg(R10_1610_MCLK_ON);
+               else if (machine_is_omap_h6300())
+                       ret = omap_cfg_reg(R10_1510_MCLK_ON);
+
+               if (!cpu_is_omap1510 ()) {
+                       /* Get the MCLK */
+                       tsc2101_mclk_ck = clk_get(NULL, "mclk");
+                       if (NULL == tsc2101_mclk_ck) {
+                               printk(KERN_ERR "Unable to get the clock MCLK!!!\n");;
+                               ret = -EPERM;
+                               goto done;
                        }
-               }
-
-               /* Get the MCLK */
-               tsc2101_mclk_ck = clk_get(NULL, "mclk");
-               if (NULL == tsc2101_mclk_ck) {
-                       printk(KERN_ERR "Unable to get the clock MCLK!!!\n");;
-                       ret = -EPERM;
-                       goto done;
-               }
-               if (clk_set_rate(tsc2101_mclk_ck, 12000000)) {
-                       printk(KERN_ERR "Unable to set rate to the MCLK!!!\n");;
-                       ret = -EPERM;
-                       goto done;
-               }
-               clk_enable(tsc2101_mclk_ck);
+                       if (clk_set_rate(tsc2101_mclk_ck, 12000000)) {
+                               printk(KERN_ERR "Unable to set rate to the MCLK!!!\n");;
+                               ret = -EPERM;
+                               goto done;
+                       }
+                       clk_enable(tsc2101_mclk_ck);
+               } /* if (!cpu_is_omap1510 ()) */
 
                ret = omap_tsc2101_configure();
 
@@ -116,10 +118,16 @@ void omap_tsc2101_disable(void)
                        }
                }
 
-               /* Release the MCLK */
-               clk_disable(tsc2101_mclk_ck);
-               clk_put(tsc2101_mclk_ck);
-               tsc2101_mclk_ck = NULL;
+               if (!cpu_is_omap1510 ()) {
+                       /* Release the MCLK */
+                       clk_disable(tsc2101_mclk_ck);
+                       clk_put(tsc2101_mclk_ck);
+                       tsc2101_mclk_ck = NULL;
+               }
+
+#if defined(CONFIG_MACH_OMAP_H6300)
+               omap_free_gpio(8);
+#endif
 
                module_put(THIS_MODULE);
        }
@@ -150,7 +158,10 @@ void omap_tsc2101_write(int page, u8 address, u16 data)
                        return;
                }
        }
-       if (machine_is_omap_h3()) {
+       if (machine_is_omap_h3() || machine_is_omap_h6300()) {
+
+               if (machine_is_omap_h6300())
+                       omap_set_gpio_dataout (8, 0);
 
                ret =
                    omap_uwire_data_transfer(0, ((page << 11) | (address << 5)),
@@ -159,6 +170,8 @@ void omap_tsc2101_write(int page, u8 address, u16 data)
                        printk(KERN_ERR
                               "uwire-write returned error for address %x\n",
                               address);
+               if (machine_is_omap_h6300())
+                       omap_set_gpio_dataout (8, 1);
                        return;
                }
                ret = omap_uwire_data_transfer(0, data, 16, 0, NULL, 0);
@@ -166,10 +179,14 @@ void omap_tsc2101_write(int page, u8 address, u16 data)
                        printk(KERN_ERR
                               "uwire-write returned error for address %x\n",
                               address);
+                       if (machine_is_omap_h6300())
+                               omap_set_gpio_dataout (8, 1);
                        return;
                }
-       }
 
+               if (machine_is_omap_h6300())
+                       omap_set_gpio_dataout (8, 1);
+       }
 }
 
 void omap_tsc2101_reads(int page, u8 startaddress, u16 * data, int numregs)
@@ -178,9 +195,13 @@ void omap_tsc2101_reads(int page, u8 startaddress, u16 * data, int numregs)
        if (machine_is_omap_h2()) {
                cs = 1;
        }
-       if (machine_is_omap_h3()) {
+       if (machine_is_omap_h3() || machine_is_omap_h6300()) {
                cs = 0;
        }
+
+       if (machine_is_omap_h6300())
+               omap_set_gpio_dataout(8, 0);
+
        (void)omap_uwire_data_transfer(cs, (0x8000 | (page << 11)
                                            | (startaddress << 5)),
                                       16, 0, NULL, 1);
@@ -188,6 +209,9 @@ void omap_tsc2101_reads(int page, u8 startaddress, u16 * data, int numregs)
                omap_uwire_data_transfer(cs, 0, 0, 16, data, 1);
        }
        omap_uwire_data_transfer(cs, 0, 0, 16, data, 0);
+
+       if (machine_is_omap_h6300())
+               omap_set_gpio_dataout(8, 1);
 }
 
 u16 omap_tsc2101_read(int page, u8 address)
@@ -228,9 +252,24 @@ static int omap_tsc2101_configure(void)
                omap_cfg_reg(N14_1610_UWIRE_CS0);
                omap_uwire_configure_mode(0, uwire_flags);
        }
+       if (machine_is_omap_h6300()) {
+               uwire_flags = UWIRE_READ_RISING_EDGE | UWIRE_WRITE_RISING_EDGE;
+               omap_cfg_reg(N14_1510_UWIRE_CS0);
+               omap_uwire_configure_mode(0, uwire_flags);
+
+               omap_request_gpio(8);
+               omap_set_gpio_dataout(8, 0);
+               omap_set_gpio_direction (8, 0);
+       }
 
        /* Configure MCLK enable */
-       omap_writel(omap_readl(PU_PD_SEL_2) | (1 << 22), PU_PD_SEL_2);  
+       if (cpu_is_omap16xx() || cpu_is_omap1710())
+               omap_writel(omap_readl(PU_PD_SEL_2) | (1 << 22), PU_PD_SEL_2);  
+       if (machine_is_omap_h6300()) {
+               omap_cfg_reg(V19_1510_UWIRE_SCLK);
+               omap_cfg_reg(W21_1510_UWIRE_SDO);
+               omap_cfg_reg(U18_1510_UWIRE_SDI);
+       }
 
        return 0;
 }
index 61b3ca16257e0fd2af63ce60851761ee6f91702d..af1d1f4c385453c4d42c7595710bbe27f6a40b1d 100644 (file)
@@ -212,6 +212,10 @@ static int __init omap_uwire_init(void)
                omap_cfg_reg(N14_1610_UWIRE_CS0);
                omap_cfg_reg(P15_1610_UWIRE_CS3);
        }
+       if (machine_is_omap_h6300()) {
+               omap_cfg_reg(N14_1510_UWIRE_CS0);
+               omap_cfg_reg(P15_1510_UWIRE_CS3);
+       }
        if (machine_is_omap_perseus2()) {
                /* configure pins: MPU_UW_nSCS1, MPU_UW_SDO, MPU_UW_SCLK */
                int val = omap_readl(OMAP730_IO_CONF_9) & ~0x00EEE000;
index 0dc24d4ba59c7f7d291216299dae512c5dfd446d..3d7fec1639e7588594b27fb0218b38b0be3b5088 100644 (file)
@@ -320,6 +320,13 @@ enum omap1xxx_index {
        P15_1610_UWIRE_CS3,
        N15_1610_UWIRE_CS1,
 
+       /* OMAP-1510 uWire */
+       P15_1510_UWIRE_CS3,
+       N14_1510_UWIRE_CS0,
+       V19_1510_UWIRE_SCLK,
+       W21_1510_UWIRE_SDO,
+       U18_1510_UWIRE_SDI,
+
        /* OMAP-1610 Flash */
        L3_1610_FLASH_CS2B_OE,
        M8_1610_FLASH_CS2B_WE,
@@ -384,6 +391,7 @@ enum omap1xxx_index {
        T20_1610_LOW_PWR,
 
        /* MCLK Settings */
+       R10_1510_MCLK_ON,
        V5_1710_MCLK_ON,
        V5_1710_MCLK_OFF,
        R10_1610_MCLK_ON,