]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
x86: unify include/asm/cache_32/64.h
authorThomas Gleixner <tglx@linutronix.de>
Mon, 15 Oct 2007 21:28:20 +0000 (23:28 +0200)
committerThomas Gleixner <tglx@inhelltoy.tec.linutronix.de>
Wed, 17 Oct 2007 18:17:15 +0000 (20:17 +0200)
Same file, except for whitespace, comment formatting and the extra
defines in _64, which are conditional on VSMP anyway.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
include/asm-x86/cache.h
include/asm-x86/cache_32.h [deleted file]
include/asm-x86/cache_64.h [deleted file]

index c36d190ac9d8f0fdeeff3405c7a019a272d26e64..1e0bac86f38f8ee4f950380e4e1845a49fec6b30 100644 (file)
@@ -1,5 +1,20 @@
-#ifdef CONFIG_X86_32
-# include "cache_32.h"
-#else
-# include "cache_64.h"
+#ifndef _ARCH_X86_CACHE_H
+#define _ARCH_X86_CACHE_H
+
+/* L1 cache line size */
+#define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT)
+#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
+
+#define __read_mostly __attribute__((__section__(".data.read_mostly")))
+
+#ifdef CONFIG_X86_VSMP
+/* vSMP Internode cacheline shift */
+#define INTERNODE_CACHE_SHIFT (12)
+#ifdef CONFIG_SMP
+#define __cacheline_aligned_in_smp                                     \
+       __attribute__((__aligned__(1 << (INTERNODE_CACHE_SHIFT))))      \
+       __attribute__((__section__(".data.page_aligned")))
+#endif
+#endif
+
 #endif
diff --git a/include/asm-x86/cache_32.h b/include/asm-x86/cache_32.h
deleted file mode 100644 (file)
index 57c62f4..0000000
+++ /dev/null
@@ -1,14 +0,0 @@
-/*
- * include/asm-i386/cache.h
- */
-#ifndef __ARCH_I386_CACHE_H
-#define __ARCH_I386_CACHE_H
-
-
-/* L1 cache line size */
-#define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT)
-#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
-
-#define __read_mostly __attribute__((__section__(".data.read_mostly")))
-
-#endif
diff --git a/include/asm-x86/cache_64.h b/include/asm-x86/cache_64.h
deleted file mode 100644 (file)
index 052df75..0000000
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * include/asm-x86_64/cache.h
- */
-#ifndef __ARCH_X8664_CACHE_H
-#define __ARCH_X8664_CACHE_H
-
-
-/* L1 cache line size */
-#define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT)
-#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
-
-#ifdef CONFIG_X86_VSMP
-
-/* vSMP Internode cacheline shift */
-#define INTERNODE_CACHE_SHIFT (12)
-#ifdef CONFIG_SMP
-#define __cacheline_aligned_in_smp                                     \
-       __attribute__((__aligned__(1 << (INTERNODE_CACHE_SHIFT))))         \
-       __attribute__((__section__(".data.page_aligned")))
-#endif
-
-#endif
-
-#define __read_mostly __attribute__((__section__(".data.read_mostly")))
-
-#endif