#
# Common support
-obj-y := irq.o id.o io.o memory.o control.o prcm.o clock.o mux.o \
+obj-y := irq.o id.o io.o sdrc2xxx.o control.o prcm.o clock.o mux.o \
devices.o serial.o gpmc.o timer-gp.o powerdomain.o \
clockdomain.o
/*
- * linux/arch/arm/mach-omap2/memory.c
+ * linux/arch/arm/mach-omap2/sdrc2xxx.c
*
- * Memory timing related functions for OMAP24XX
+ * SDRAM timing related functions for OMAP2xxx
*
* Copyright (C) 2005 Texas Instruments Inc.
* Richard Woodruff <r-woodruff2@ti.com>
if ((curr_perf_level == level) && !force)
return prev;
- if (level == CORE_CLK_SRC_DPLL) {
+ if (level == CORE_CLK_SRC_DPLL)
dll_ctrl = omap2_memory_get_slow_dll_ctrl();
- } else if (level == CORE_CLK_SRC_DPLL_X2) {
+ else if (level == CORE_CLK_SRC_DPLL_X2)
dll_ctrl = omap2_memory_get_fast_dll_ctrl();
- } else {
+ else
return prev;
- }
m_type = omap2_memory_get_type();
unsigned long dll_cnt;
u32 fast_dll = 0;
- mem_timings.m_type = !((sdrc_read_reg(SDRC_MR_0) & 0x3) == 0x1); /* DDR = 1, SDR = 0 */
+ /* DDR = 1, SDR = 0 */
+ mem_timings.m_type = !((sdrc_read_reg(SDRC_MR_0) & 0x3) == 0x1);
/* 2422 es2.05 and beyond has a single SIP DDR instead of 2 like others.
* In the case of 2422, its ok to use CS1 instead of CS0.