hw_ep = txChannel->hw_ep;
- txChannel->Channel.dwActualLength =
+ txChannel->Channel.actual_len =
txChannel->actualLen;
/* Peripheral role never repurposes the
hw_ep = rxChannel->hw_ep;
- rxChannel->Channel.dwActualLength =
+ rxChannel->Channel.actual_len =
rxChannel->actualLen;
core_rxirq_disable(regBase, chanNum + 1);
musb_dma_completion(musb, chanNum + 1, 0);
* @private_data: channel-private data
* @wMaxLength: the maximum number of bytes the channel can move in one
* transaction (typically representing many USB maximum-sized packets)
- * @dwActualLength: how many bytes have been transferred
+ * @actual_len: how many bytes have been transferred
* @bStatus: current channel status (updated e.g. on interrupt)
* @bDesiredMode: TRUE if mode 1 is desired; FALSE if mode 0 is desired
*
void *private_data;
// FIXME not void* private_data, but a dma_controller *
size_t max_len;
- size_t dwActualLength;
+ size_t actual_len;
enum dma_channel_status bStatus;
u8 bDesiredMode;
};
musb_writew(epio, MGC_O_HDRC_TXCSR, wCsrVal);
/* ensure writebuffer is empty */
wCsrVal = musb_readw(epio, MGC_O_HDRC_TXCSR);
- pRequest->actual += musb_ep->dma->dwActualLength;
+ pRequest->actual += musb_ep->dma->actual_len;
DBG(4, "TXCSR%d %04x, dma off, "
"len %Zd, req %p\n",
epnum, wCsrVal,
- musb_ep->dma->dwActualLength,
+ musb_ep->dma->actual_len,
pRequest);
}
if (dma_channel_status(dma) == MGC_DMA_STATUS_BUSY) {
dma->bStatus = MGC_DMA_STATUS_CORE_ABORT;
(void) musb->dma_controller->channel_abort(dma);
- pRequest->actual += musb_ep->dma->dwActualLength;
+ pRequest->actual += musb_ep->dma->actual_len;
}
wCsrVal |= MGC_M_RXCSR_P_WZC_BITS;
musb_writew(epio, MGC_O_HDRC_RXCSR,
MGC_M_RXCSR_P_WZC_BITS | wCsrVal);
- pRequest->actual += musb_ep->dma->dwActualLength;
+ pRequest->actual += musb_ep->dma->actual_len;
DBG(4, "RXCSR%d %04x, dma off, %04x, len %Zd, req %p\n",
epnum, wCsrVal,
musb_readw(epio, MGC_O_HDRC_RXCSR),
- musb_ep->dma->dwActualLength, pRequest);
+ musb_ep->dma->actual_len, pRequest);
#if defined(CONFIG_USB_INVENTRA_DMA) || defined(CONFIG_USB_TUSB_OMAP_DMA)
/* Autoclear doesn't clear RxPktRdy for short packets */
if ((dma->bDesiredMode == 0)
- || (dma->dwActualLength
+ || (dma->actual_len
& (musb_ep->wPacketSize - 1))) {
/* ack the read! */
wCsrVal &= ~MGC_M_RXCSR_RXPKTRDY;
/* incomplete, and not short? wait for next IN packet */
if ((pRequest->actual < pRequest->length)
- && (musb_ep->dma->dwActualLength
+ && (musb_ep->dma->actual_len
== musb_ep->wPacketSize))
goto done;
#endif
musb_writew(epio, MGC_O_HDRC_TXCSR,
wCsr | MGC_M_TXCSR_MODE);
- pDmaChannel->dwActualLength = 0L;
+ pDmaChannel->actual_len = 0L;
qh->segsize = dwLength;
/* TX uses "rndis" mode automatically, but needs help
if ((is_cppi_enabled() || tusb_dma_omap()) && pDmaChannel) {
/* candidate for DMA */
if (pDmaChannel) {
- pDmaChannel->dwActualLength = 0L;
+ pDmaChannel->actual_len = 0L;
qh->segsize = dwLength;
/* AUTOREQ is in a DMA register */
/* REVISIT this looks wrong... */
if (!status || dma || usb_pipeisoc(nPipe)) {
if (dma)
- wLength = dma->dwActualLength;
+ wLength = dma->actual_len;
else
wLength = qh->segsize;
qh->offset += wLength;
DBG(5, "<== hw %d rxcsr %04x, urb actual %d (+dma %zd)\n",
epnum, wRxCsrVal, pUrb->actual_length,
- dma ? dma->dwActualLength : 0);
+ dma ? dma->actual_len : 0);
/* check for errors, concurrent stall & unlink is not really
* handled yet! */
if (dma_channel_status(dma) == MGC_DMA_STATUS_BUSY) {
dma->bStatus = MGC_DMA_STATUS_CORE_ABORT;
(void) musb->dma_controller->channel_abort(dma);
- xfer_len = dma->dwActualLength;
+ xfer_len = dma->actual_len;
}
musb_h_flush_rxfifo(hw_ep, 0);
musb_writeb(epio, MGC_O_HDRC_RXINTERVAL, 0);
if (dma_channel_status(dma) == MGC_DMA_STATUS_BUSY) {
dma->bStatus = MGC_DMA_STATUS_CORE_ABORT;
(void) musb->dma_controller->channel_abort(dma);
- xfer_len = dma->dwActualLength;
+ xfer_len = dma->actual_len;
bDone = TRUE;
}
}
#endif
if (dma && (wRxCsrVal & MGC_M_RXCSR_DMAENAB)) {
- xfer_len = dma->dwActualLength;
+ xfer_len = dma->actual_len;
wVal &= ~(MGC_M_RXCSR_DMAENAB
| MGC_M_RXCSR_H_AUTOREQ
/* bDone if pUrb buffer is full or short packet is recd */
bDone = ((pUrb->actual_length + xfer_len) >=
pUrb->transfer_buffer_length)
- || (dma->dwActualLength & (qh->maxpacket - 1));
+ || (dma->actual_len & (qh->maxpacket - 1));
/* send IN token for next packet, without AUTOREQ */
if (!bDone) {
"abort %cX%d DMA for urb %p --> %d\n",
is_in ? 'R' : 'T', ep->epnum,
urb, status);
- urb->actual_length += dma->dwActualLength;
+ urb->actual_length += dma->actual_len;
}
}
pChannel->max_len = 0x10000;
/* Tx => mode 1; Rx => mode 0 */
pChannel->bDesiredMode = bTransmit;
- pChannel->dwActualLength = 0;
+ pChannel->actual_len = 0;
break;
}
}
struct musb_dma_channel *pImplChannel =
(struct musb_dma_channel *) pChannel->private_data;
- pChannel->dwActualLength = 0;
+ pChannel->actual_len = 0;
pImplChannel->dwStartAddress = 0;
pImplChannel->len = 0;
BUG_ON(pChannel->bStatus == MGC_DMA_STATUS_UNKNOWN ||
pChannel->bStatus == MGC_DMA_STATUS_BUSY);
- pChannel->dwActualLength = 0;
+ pChannel->actual_len = 0;
pImplChannel->dwStartAddress = dma_addr;
pImplChannel->len = dwLength;
pImplChannel->wMaxPacketSize = wPacketSize;
MGC_HSDMA_CHANNEL_OFFSET(
bChannel,
MGC_O_HSDMA_ADDRESS));
- pChannel->dwActualLength =
+ pChannel->actual_len =
dwAddress - pImplChannel->dwStartAddress;
DBG(2, "ch %p, 0x%x -> 0x%x (%d / %d) %s\n",
pChannel, pImplChannel->dwStartAddress,
- dwAddress, pChannel->dwActualLength,
+ dwAddress, pChannel->actual_len,
pImplChannel->len,
- (pChannel->dwActualLength <
+ (pChannel->actual_len <
pImplChannel->len) ?
"=> reconfig 0": "=> complete");
if ((devctl & MGC_M_DEVCTL_HM)
&& (pImplChannel->bTransmit)
&& ((pChannel->bDesiredMode == 0)
- || (pChannel->dwActualLength &
+ || (pChannel->actual_len &
(pImplChannel->wMaxPacketSize - 1)))
) {
/* Send out the packet */
remaining = 0;
}
- channel->dwActualLength = chdat->transfer_len - remaining;
- pio = chdat->len - channel->dwActualLength;
+ channel->actual_len = chdat->transfer_len - remaining;
+ pio = chdat->len - channel->actual_len;
DBG(2, "DMA remaining %lu/%u\n", remaining, chdat->transfer_len);
consistent_sync(phys_to_virt((u32)chdat->dma_addr),
chdat->transfer_len, DMA_FROM_DEVICE);
}
- channel->dwActualLength += pio;
+ channel->actual_len += pio;
}
if (!dmareq_works())
chdat->packet_sz = packet_sz;
chdat->len = len;
- channel->dwActualLength = 0;
+ channel->actual_len = 0;
chdat->dma_addr = (void __iomem *)dma_addr;
channel->bStatus = MGC_DMA_STATUS_BUSY;
channel->max_len = 0x7fffffff;
channel->bDesiredMode = 0;
- channel->dwActualLength = 0;
+ channel->actual_len = 0;
if (dmareq_works()) {
ret = tusb_omap_dma_allocate_dmareq(chdat);