]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
[POWERPC] Add support for the mpc832x mds board
authorKim Phillips <kim.phillips@freescale.com>
Tue, 3 Oct 2006 01:10:30 +0000 (20:10 -0500)
committerPaul Mackerras <paulus@samba.org>
Wed, 4 Oct 2006 05:27:49 +0000 (15:27 +1000)
Add support for MPC832x MDS evaluation board.

This patch depends on the 8360+QE lib patches by Leo.

The MPC832x processors (MPC8323E, MPC8323, MPC8321E, MPC8321) sport
the e300c2 core plus a QUICC Engine (QE).  This patch adds support for
the 832x MDS evaluation board.

The 832x MDS dts and defconfig files are pending more tests.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
arch/powerpc/platforms/83xx/Kconfig
arch/powerpc/platforms/83xx/mpc832x_mds.c [new file with mode: 0644]
arch/powerpc/platforms/83xx/mpc832x_mds.h [new file with mode: 0644]

index 5fe7b7faf45f1f8197148ea2533879d6474887d0..0975e94ac7c469bc416b0f9fab57de41e4ff0a52 100644 (file)
@@ -5,6 +5,13 @@ choice
        prompt "Machine Type"
        default MPC834x_SYS
 
+config MPC832x_MDS
+       bool "Freescale MPC832x MDS"
+       select DEFAULT_UIMAGE
+       select QUICC_ENGINE
+       help
+         This option enables support for the MPC832x MDS evaluation board.
+
 config MPC834x_SYS
        bool "Freescale MPC834x SYS"
        select DEFAULT_UIMAGE
@@ -27,6 +34,12 @@ config MPC834x_ITX
 
 endchoice
 
+config PPC_MPC832x
+       bool
+       select PPC_UDBG_16550
+       select PPC_INDIRECT_PCI
+       default y if MPC832x_MDS
+
 config MPC834x
        bool
        select PPC_UDBG_16550
diff --git a/arch/powerpc/platforms/83xx/mpc832x_mds.c b/arch/powerpc/platforms/83xx/mpc832x_mds.c
new file mode 100644 (file)
index 0000000..54dea9d
--- /dev/null
@@ -0,0 +1,215 @@
+/*
+ * Copyright (C) Freescale Semicondutor, Inc. 2006. All rights reserved.
+ *
+ * Description:
+ * MPC832xE MDS board specific routines.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/reboot.h>
+#include <linux/pci.h>
+#include <linux/kdev_t.h>
+#include <linux/major.h>
+#include <linux/console.h>
+#include <linux/delay.h>
+#include <linux/seq_file.h>
+#include <linux/root_dev.h>
+#include <linux/initrd.h>
+
+#include <asm/system.h>
+#include <asm/atomic.h>
+#include <asm/time.h>
+#include <asm/io.h>
+#include <asm/machdep.h>
+#include <asm/ipic.h>
+#include <asm/bootinfo.h>
+#include <asm/irq.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <sysdev/fsl_soc.h>
+#include <asm/qe.h>
+#include <asm/qe_ic.h>
+
+#include "mpc83xx.h"
+#include "mpc832x_mds.h"
+
+#undef DEBUG
+#ifdef DEBUG
+#define DBG(fmt...) udbg_printf(fmt)
+#else
+#define DBG(fmt...)
+#endif
+
+#ifndef CONFIG_PCI
+unsigned long isa_io_base = 0;
+unsigned long isa_mem_base = 0;
+#endif
+
+static u8 *bcsr_regs = NULL;
+
+u8 *get_bcsr(void)
+{
+       return bcsr_regs;
+}
+
+/* ************************************************************************
+ *
+ * Setup the architecture
+ *
+ */
+static void __init mpc832x_sys_setup_arch(void)
+{
+       struct device_node *np;
+
+       if (ppc_md.progress)
+               ppc_md.progress("mpc832x_sys_setup_arch()", 0);
+
+       np = of_find_node_by_type(NULL, "cpu");
+       if (np != 0) {
+               unsigned int *fp =
+                   (int *)get_property(np, "clock-frequency", NULL);
+               if (fp != 0)
+                       loops_per_jiffy = *fp / HZ;
+               else
+                       loops_per_jiffy = 50000000 / HZ;
+               of_node_put(np);
+       }
+
+       /* Map BCSR area */
+       np = of_find_node_by_name(NULL, "bcsr");
+       if (np != 0) {
+               struct resource res;
+
+               of_address_to_resource(np, 0, &res);
+               bcsr_regs = ioremap(res.start, res.end - res.start +1);
+               of_node_put(np);
+       }
+
+#ifdef CONFIG_PCI
+       for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
+               add_bridge(np);
+
+       ppc_md.pci_swizzle = common_swizzle;
+       ppc_md.pci_exclude_device = mpc83xx_exclude_device;
+#endif
+
+#ifdef CONFIG_QUICC_ENGINE
+       qe_reset();
+
+       if ((np = of_find_node_by_name(np, "par_io")) != NULL) {
+               par_io_init(np);
+               of_node_put(np);
+
+               for (np = NULL; (np = of_find_node_by_name(np, "ucc")) != NULL;)
+                       par_io_of_config(np);
+       }
+
+       if ((np = of_find_compatible_node(NULL, "network", "ucc_geth"))
+                       != NULL){
+               /* Reset the Ethernet PHY */
+               bcsr_regs[9] &= ~0x20;
+               udelay(1000);
+               bcsr_regs[9] |= 0x20;
+               iounmap(bcsr_regs);
+               of_node_put(np);
+       }
+
+#endif                         /* CONFIG_QUICC_ENGINE */
+
+#ifdef CONFIG_BLK_DEV_INITRD
+       if (initrd_start)
+               ROOT_DEV = Root_RAM0;
+       else
+#endif
+#ifdef  CONFIG_ROOT_NFS
+               ROOT_DEV = Root_NFS;
+#else
+               ROOT_DEV = Root_HDA1;
+#endif
+}
+
+void __init mpc832x_sys_init_IRQ(void)
+{
+
+       struct device_node *np;
+
+       np = of_find_node_by_type(NULL, "ipic");
+       if (!np)
+               return;
+
+       ipic_init(np, 0);
+
+       /* Initialize the default interrupt mapping priorities,
+        * in case the boot rom changed something on us.
+        */
+       ipic_set_default_priority();
+       of_node_put(np);
+
+#ifdef CONFIG_QUICC_ENGINE
+       np = of_find_node_by_type(NULL, "qeic");
+       if (!np)
+               return;
+
+       qe_ic_init(np, 0);
+       of_node_put(np);
+#endif                         /* CONFIG_QUICC_ENGINE */
+}
+
+#if defined(CONFIG_I2C_MPC) && defined(CONFIG_SENSORS_DS1374)
+extern ulong ds1374_get_rtc_time(void);
+extern int ds1374_set_rtc_time(ulong);
+
+static int __init mpc832x_rtc_hookup(void)
+{
+       struct timespec tv;
+
+       ppc_md.get_rtc_time = ds1374_get_rtc_time;
+       ppc_md.set_rtc_time = ds1374_set_rtc_time;
+
+       tv.tv_nsec = 0;
+       tv.tv_sec = (ppc_md.get_rtc_time) ();
+       do_settimeofday(&tv);
+
+       return 0;
+}
+
+late_initcall(mpc832x_rtc_hookup);
+#endif
+
+/*
+ * Called very early, MMU is off, device-tree isn't unflattened
+ */
+static int __init mpc832x_sys_probe(void)
+{
+       char *model = of_get_flat_dt_prop(of_get_flat_dt_root(),
+                                         "model", NULL);
+
+       if (model == NULL)
+               return 0;
+       if (strcmp(model, "MPC8323EMDS"))
+               return 0;
+
+       DBG("%s found\n", model);
+
+       return 1;
+}
+
+define_machine(mpc832x_mds) {
+       .name           = "MPC832x MDS",
+       .probe          = mpc832x_sys_probe,
+       .setup_arch     = mpc832x_sys_setup_arch,
+       .init_IRQ       = mpc832x_sys_init_IRQ,
+       .get_irq        = ipic_get_irq,
+       .restart        = mpc83xx_restart,
+       .time_init      = mpc83xx_time_init,
+       .calibrate_decr = generic_calibrate_decr,
+       .progress       = udbg_progress,
+};
diff --git a/arch/powerpc/platforms/83xx/mpc832x_mds.h b/arch/powerpc/platforms/83xx/mpc832x_mds.h
new file mode 100644 (file)
index 0000000..a495889
--- /dev/null
@@ -0,0 +1,19 @@
+/*
+ * Copyright (C) Freescale Semicondutor, Inc. 2006. All rights reserved.
+ *
+ * Description:
+ * MPC832x MDS board specific header.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ */
+
+#ifndef __MACH_MPC832x_MDS_H__
+#define __MACH_MPC832x_MDS_H__
+
+extern u8 *get_bcsr(void);
+
+#endif                         /* __MACH_MPC832x_MDS_H__ */