]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
ide: use only ->set_pio_mode method for programming PIO modes (take 2)
authorBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Thu, 11 Oct 2007 21:54:02 +0000 (23:54 +0200)
committerBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Thu, 11 Oct 2007 21:54:02 +0000 (23:54 +0200)
Use ->set_pio_mode method to program PIO modes in ide_set_xfer_rate()
(the only place which used ->speedproc to program PIO modes) and remove
handling of PIO modes from all ->speedproc implementations.

v2:
* Fix pmac_ide_tune_chipset() comment.

There should be no functionality changes caused by this patch.

Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
19 files changed:
drivers/ide/cris/ide-cris.c
drivers/ide/ide-lib.c
drivers/ide/mips/au1xxx-ide.c
drivers/ide/pci/alim15x3.c
drivers/ide/pci/atiixp.c
drivers/ide/pci/cmd64x.c
drivers/ide/pci/cs5520.c
drivers/ide/pci/cs5530.c
drivers/ide/pci/it8213.c
drivers/ide/pci/it821x.c
drivers/ide/pci/piix.c
drivers/ide/pci/sc1200.c
drivers/ide/pci/scc_pata.c
drivers/ide/pci/serverworks.c
drivers/ide/pci/siimage.c
drivers/ide/pci/sis5513.c
drivers/ide/pci/sl82c105.c
drivers/ide/pci/slc90e66.c
drivers/ide/ppc/pmac.c

index 7c90218e9319e03099a97de2b731191d056a06b4..4bb42b30bfc0d34874d5549abbb37b33b4c833ee 100644 (file)
@@ -724,11 +724,6 @@ static int speed_cris_ide(ide_drive_t *drive, const u8 speed)
 {
        int cyc = 0, dvs = 0, strobe = 0, hold = 0;
 
-       if (speed >= XFER_PIO_0 && speed <= XFER_PIO_4) {
-               cris_set_pio_mode(drive, speed - XFER_PIO_0);
-               return ide_config_drive_speed(drive, speed);
-       }
-
        switch(speed)
        {
                case XFER_UDMA_0:
index 8400b1b4aa1b1a004ad9ef434bee963cb393d784..d97390c0543b823e4da4176e158f8a0061b6ebb9 100644 (file)
@@ -398,6 +398,18 @@ int ide_set_xfer_rate(ide_drive_t *drive, u8 rate)
 
        rate = ide_rate_filter(drive, rate);
 
+       if (rate >= XFER_PIO_0 && rate <= XFER_PIO_5) {
+               if (hwif->set_pio_mode)
+                       hwif->set_pio_mode(drive, rate - XFER_PIO_0);
+
+               /*
+                * FIXME: this is incorrect to return zero here but
+                * since all users of ide_set_xfer_rate() ignore
+                * the return value it is not a problem currently
+                */
+               return 0;
+       }
+
        return hwif->speedproc(drive, rate);
 }
 
index 670cb748481f3916d5c5f0b3dc1daef7cdd21c69..85819ae20602e9c5696f78642e9032944680d4e0 100644 (file)
@@ -177,11 +177,6 @@ static int auide_tune_chipset(ide_drive_t *drive, const u8 speed)
        mem_sttime = 0;
        mem_stcfg  = au_readl(MEM_STCFG2);
 
-       if (speed >= XFER_PIO_0 && speed <= XFER_PIO_4) {
-               au1xxx_set_pio_mode(drive, speed - XFER_PIO_0);
-               return 0;
-       }
-
        switch(speed) {
 #ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
        case XFER_MW_DMA_2:
index f15c8879d2c19fbb9dfb6a71467678699d847ad4..80013d2bb0391062fcf7a33e1d42bb1f16e6b9aa 100644 (file)
@@ -421,11 +421,6 @@ static int ali15x3_tune_chipset(ide_drive_t *drive, const u8 speed)
        if (speed < XFER_PIO_0)
                return 1;
 
-       if (speed >= XFER_PIO_0 && speed <= XFER_PIO_5) {
-               ali_tune_pio(drive, speed - XFER_PIO_0);
-               return ide_config_drive_speed(drive, speed);
-       }
-
        if (speed == XFER_UDMA_6)
                speed1 = 0x47;
 
index b9f66f53f9a6d6d57f8733a2e117838d65944990..178876a3afca7d50d94b4c802b61cd67c83913b5 100644 (file)
@@ -178,11 +178,6 @@ static int atiixp_speedproc(ide_drive_t *drive, const u8 speed)
        u16 tmp16;
        u8 pio;
 
-       if (speed >= XFER_PIO_0 && speed <= XFER_PIO_4) {
-               atiixp_tune_pio(drive, speed - XFER_PIO_0);
-               return ide_config_drive_speed(drive, speed);
-       }
-
        spin_lock_irqsave(&atiixp_lock, flags);
 
        save_mdma_mode[drive->dn] = 0;
index 85f5e42eb831bbb2be97f5c3fdf6834263a1f70e..0b568c60f9263767d0936a32a94efeb4c7c72e16 100644 (file)
@@ -323,14 +323,6 @@ static int cmd64x_tune_chipset(ide_drive_t *drive, const u8 speed)
        case XFER_MW_DMA_0:
                program_cycle_times(drive, 480, 215);
                break;
-       case XFER_PIO_5:
-       case XFER_PIO_4:
-       case XFER_PIO_3:
-       case XFER_PIO_2:
-       case XFER_PIO_1:
-       case XFER_PIO_0:
-               cmd64x_tune_pio(drive, speed - XFER_PIO_0);
-               break;
        default:
                return 1;
        }
index e6af534a7190a9ef0600c603b0d0c72078f9ddb5..1217d2a747fbbee24c305471dfe6e0113b66b1f4 100644 (file)
@@ -66,30 +66,13 @@ static struct pio_clocks cs5520_pio_clocks[]={
        {1, 2, 1}
 };
 
-static int cs5520_tune_chipset(ide_drive_t *drive, const u8 speed)
+static void cs5520_set_pio_mode(ide_drive_t *drive, const u8 pio)
 {
        ide_hwif_t *hwif = HWIF(drive);
        struct pci_dev *pdev = hwif->pci_dev;
-       int pio = speed;
-       u8 reg;
        int controller = drive->dn > 1 ? 1 : 0;
+       u8 reg;
 
-       switch(speed)
-       {
-               case XFER_PIO_4:
-               case XFER_PIO_3:
-               case XFER_PIO_2:
-               case XFER_PIO_1:
-               case XFER_PIO_0:
-                       pio -= XFER_PIO_0;
-                       break;
-               default:
-                       pio = 0;
-                       printk(KERN_ERR "cs55x0: bad ide timing.\n");
-       }
-       
-       printk("PIO clocking = %d\n", pio);
-       
        /* FIXME: if DMA = 1 do we need to set the DMA bit here ? */
 
        /* 8bit CAT/CRT - 8bit command timing for channel */
@@ -114,12 +97,21 @@ static int cs5520_tune_chipset(ide_drive_t *drive, const u8 speed)
        reg |= 1<<((drive->dn&1)+5);
        outb(reg, hwif->dma_base + 0x02 + 8*controller);
 
-       return ide_config_drive_speed(drive, speed);
+       (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio);
 }
 
-static void cs5520_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static int cs5520_tune_chipset(ide_drive_t *drive, const u8 speed)
 {
-       cs5520_tune_chipset(drive, XFER_PIO_0 + pio);
+       printk(KERN_ERR "cs55x0: bad ide timing.\n");
+
+       cs5520_set_pio_mode(drive, 0);
+
+       /*
+        * FIXME: this is incorrect to return zero here but
+        * since all users of ide_set_xfer_rate() ignore
+        * the return value it is not a problem currently
+        */
+       return 0;
 }
 
 static int cs5520_config_drive_xfer_rate(ide_drive_t *drive)
index 1588a323c5d0d8a418152c1ca72a2ceca11c8126..741507b4cd93b0c789599fec220240c8424e7c92 100644 (file)
@@ -163,13 +163,6 @@ static int cs5530_tune_chipset(ide_drive_t *drive, const u8 mode)
                case XFER_MW_DMA_0:     timings = 0x00077771; break;
                case XFER_MW_DMA_1:     timings = 0x00012121; break;
                case XFER_MW_DMA_2:     timings = 0x00002020; break;
-               case XFER_PIO_4:
-               case XFER_PIO_3:
-               case XFER_PIO_2:
-               case XFER_PIO_1:
-               case XFER_PIO_0:
-                       cs5530_tunepio(drive, mode - XFER_PIO_0);
-                       return 0;
                default:
                        BUG();
                        break;
index 24ef091ec5b9bac3b35302896cb26eaccfe141f4..76e91ff9420b87221b144c4042dbe85d34452da5 100644 (file)
@@ -132,11 +132,6 @@ static int it8213_tune_chipset(ide_drive_t *drive, const u8 speed)
        u16                     reg4042, reg4a;
        u8                      reg48, reg54, reg55;
 
-       if (speed >= XFER_PIO_0 && speed <= XFER_PIO_4) {
-               it8213_tune_pio(drive, speed - XFER_PIO_0);
-               return ide_config_drive_speed(drive, speed);
-       }
-
        pci_read_config_word(dev, maslave, &reg4042);
        pci_read_config_byte(dev, 0x48, &reg48);
        pci_read_config_word(dev, 0x4a, &reg4a);
index 0cce4a7f5e46b90a9d43afc03b281a1654854c1c..758a98230cc5fcf8183499c4fa74d24f12bdc685 100644 (file)
@@ -418,15 +418,6 @@ static int it821x_tune_chipset(ide_drive_t *drive, const u8 speed)
        ide_hwif_t *hwif        = drive->hwif;
        struct it821x_dev *itdev = ide_get_hwifdata(hwif);
 
-       switch (speed) {
-       case XFER_PIO_4:
-       case XFER_PIO_3:
-       case XFER_PIO_2:
-       case XFER_PIO_1:
-       case XFER_PIO_0:
-               return it821x_tunepio(drive, speed - XFER_PIO_0);
-       }
-
        if (itdev->smart == 0) {
                switch (speed) {
                        /* MWDMA tuning is really hard because our MWDMA and PIO
index 860b929f6e583391bf7a76954ace80bcf923fed1..fd8214a7ab9877e2a7d73045df361ffb30fe911e 100644 (file)
@@ -242,11 +242,6 @@ static int piix_tune_chipset(ide_drive_t *drive, const u8 speed)
        u16                     reg4042, reg4a;
        u8                      reg48, reg54, reg55;
 
-       if (speed >= XFER_PIO_0 && speed <= XFER_PIO_4) {
-               piix_tune_pio(drive, speed - XFER_PIO_0);
-               return ide_config_drive_speed(drive, speed);
-       }
-
        pci_read_config_word(dev, maslave, &reg4042);
        sitre = (reg4042 & 0x4000) ? 1 : 0;
        pci_read_config_byte(dev, 0x48, &reg48);
index d46627eced91598c82009a3362b981b0924d4f5a..79ecab6894891de0480349cd3f98268ba3f2a24e 100644 (file)
@@ -152,16 +152,6 @@ static int sc1200_tune_chipset(ide_drive_t *drive, const u8 mode)
        if (sc1200_set_xfer_mode(drive, mode))
                return 1;       /* failure */
 
-       switch (mode) {
-       case XFER_PIO_4:
-       case XFER_PIO_3:
-       case XFER_PIO_2:
-       case XFER_PIO_1:
-       case XFER_PIO_0:
-               sc1200_tunepio(drive, mode - XFER_PIO_0);
-               return 0;
-       }
-
        pci_clock = sc1200_get_pci_clock();
 
        /*
index 3505d57eda18bf1a7a687910d302dffaaea1aa84..66a526e0ece4bd4e1fbd127bde869b5b7cfc76b5 100644 (file)
@@ -270,13 +270,6 @@ static int scc_tune_chipset(ide_drive_t *drive, const u8 speed)
        case XFER_UDMA_0:
                idx = speed - XFER_UDMA_0;
                break;
-       case XFER_PIO_4:
-       case XFER_PIO_3:
-       case XFER_PIO_2:
-       case XFER_PIO_1:
-       case XFER_PIO_0:
-               scc_tune_pio(drive, speed - XFER_PIO_0);
-               return ide_config_drive_speed(drive, speed);
        default:
                return 1;
        }
index f4e08abf0fee230a271a3fa1a2e9a1ec81004e90..0351cf2104271bbdecb2869d46a8451bdf18d554 100644 (file)
@@ -157,11 +157,6 @@ static int svwks_tune_chipset(ide_drive_t *drive, const u8 speed)
 
        u8 ultra_enable  = 0, ultra_timing = 0, dma_timing = 0;
 
-       if (speed >= XFER_PIO_0 && speed <= XFER_PIO_4) {
-               svwks_tune_pio(drive, speed - XFER_PIO_0);
-               return ide_config_drive_speed(drive, speed);
-       }
-
        /* If we are about to put a disk into UDMA mode we screwed up.
           Our code assumes we never _ever_ do this on an OSB4 */
           
index c526c70d65a4c1d8d53ccdebc10d997d70a87515..5d1e5e52a0447a02ebd481639fdd541b9cbc7912 100644 (file)
@@ -284,13 +284,6 @@ static int siimage_tune_chipset(ide_drive_t *drive, const u8 speed)
        scsc = is_sata(hwif) ? 1 : scsc;
 
        switch(speed) {
-               case XFER_PIO_4:
-               case XFER_PIO_3:
-               case XFER_PIO_2:
-               case XFER_PIO_1:
-               case XFER_PIO_0:
-                       sil_tune_pio(drive, speed - XFER_PIO_0);
-                       return ide_config_drive_speed(drive, speed);
                case XFER_MW_DMA_2:
                case XFER_MW_DMA_1:
                case XFER_MW_DMA_0:
index 3a8cb1468a763d353be6d3dc604e4a9034f4868f..3e18899de631450ac6c1dec6ae8158b7646f0df0 100644 (file)
@@ -519,15 +519,10 @@ static void config_art_rwp_pio (ide_drive_t *drive, u8 pio)
        }
 }
 
-static int sis5513_tune_drive(ide_drive_t *drive, const u8 pio)
-{
-       config_art_rwp_pio(drive, pio);
-       return ide_config_drive_speed(drive, XFER_PIO_0 + pio);
-}
-
 static void sis_set_pio_mode(ide_drive_t *drive, const u8 pio)
 {
-       (void)sis5513_tune_drive(drive, pio);
+       config_art_rwp_pio(drive, pio);
+       (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio);
 }
 
 static int sis5513_tune_chipset(ide_drive_t *drive, const u8 speed)
@@ -537,9 +532,6 @@ static int sis5513_tune_chipset(ide_drive_t *drive, const u8 speed)
        u32 regdw;
        u8 drive_pci, reg;
 
-       if (speed >= XFER_PIO_0 && speed <= XFER_PIO_4)
-               return sis5513_tune_drive(drive, speed - XFER_PIO_0);
-
        /* See config_art_rwp_pio for drive pci config registers */
        drive_pci = 0x40;
        if (chipset_family >= ATA_133) {
index 131e91ca1d82c9365fc1dc55b83ff16c992c215f..f492318ba79724b0b702c9bb4fd794cc66aaf5f5 100644 (file)
@@ -139,14 +139,6 @@ static int sl82c105_tune_chipset(ide_drive_t *drive, const u8 speed)
                        pci_write_config_word(dev, reg, drv_ctrl);
                }
                break;
-       case XFER_PIO_5:
-       case XFER_PIO_4:
-       case XFER_PIO_3:
-       case XFER_PIO_2:
-       case XFER_PIO_1:
-       case XFER_PIO_0:
-               sl82c105_tune_pio(drive, speed - XFER_PIO_0);
-               break;
        default:
                return -1;
        }
index 967b939e9d2ead07ff2654c1b1c2842c3b1a7c79..ae8e9132457773130336b02ac9110227bc595110 100644 (file)
@@ -110,11 +110,6 @@ static int slc90e66_tune_chipset(ide_drive_t *drive, const u8 speed)
        int u_speed = 0, u_flag = 1 << drive->dn;
        u16                     reg4042, reg44, reg48, reg4a;
 
-       if (speed >= XFER_PIO_0 && speed <= XFER_PIO_4) {
-               slc90e66_tune_pio(drive, speed - XFER_PIO_0);
-               return ide_config_drive_speed(drive, speed);
-       }
-
        pci_read_config_word(dev, maslave, &reg4042);
        sitre = (reg4042 & 0x4000) ? 1 : 0;
        pci_read_config_word(dev, 0x44, &reg44);
index 4da251882cc197681987e256a91ff5b752ba7844..f759a53978651b82c28f0cd257f865ee8f7febfe 100644 (file)
@@ -917,7 +917,7 @@ set_timings_mdma(ide_drive_t *drive, int intf_type, u32 *timings, u32 *timings2,
 
 /* 
  * Speedproc. This function is called by the core to set any of the standard
- * timing (PIO, MDMA or UDMA) to both the drive and the controller.
+ * DMA timing (MDMA or UDMA) to both the drive and the controller.
  * You may notice we don't use this function on normal "dma check" operation,
  * our dedicated function is more precise as it uses the drive provided
  * cycle time value. We should probably fix this one to deal with that too...
@@ -964,13 +964,6 @@ static int pmac_ide_tune_chipset(ide_drive_t *drive, const u8 speed)
                case XFER_SW_DMA_0:
                        return 1;
 #endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */
-               case XFER_PIO_4:
-               case XFER_PIO_3:
-               case XFER_PIO_2:
-               case XFER_PIO_1:
-               case XFER_PIO_0:
-                       pmac_ide_set_pio_mode(drive, speed & 0x07);
-                       return 0;
                default:
                        ret = 1;
        }