[MTD] [NAND] Remember timing settings for CAFÉ NAND controller.

We'll need them for suspend/resume.

Signed-off-by: David Woodhouse <dwmw2@infradead.org>

diff --git a/drivers/mtd/nand/cafe.c b/drivers/mtd/nand/cafe.c
index fd6bb3ed40dfb73936abf9481527915038d002a7..c328a7514510d836e843b6657e4bf1f71340389b 100644 (file)
--- a/drivers/mtd/nand/cafe.c
+++ b/drivers/mtd/nand/cafe.c
@@ -530,7 +530,6 @@ static int __devinit cafe_nand_probe(struct pci_dev *pdev,
 {
        struct mtd_info *mtd;
        struct cafe_priv *cafe;
-       uint32_t timing1, timing2, timing3;
        uint32_t ctrl;
        int err = 0;
 
@@ -587,21 +586,19 @@ static int __devinit cafe_nand_probe(struct pci_dev *pdev,
        }
 
        if (numtimings == 3) {
-               timing1 = timing[0];
-               timing2 = timing[1];
-               timing3 = timing[2];
                cafe_dev_dbg(&cafe->pdev->dev, "Using provided timings (%08x %08x %08x)\n",
-                            timing1, timing2, timing3);
+                            timing[0], timing[1], timing[2]);
        } else {
-               timing1 = cafe_readl(cafe, NAND_TIMING1);
-               timing2 = cafe_readl(cafe, NAND_TIMING2);
-               timing3 = cafe_readl(cafe, NAND_TIMING3);
+               timing[0] = cafe_readl(cafe, NAND_TIMING1);
+               timing[1] = cafe_readl(cafe, NAND_TIMING2);
+               timing[2] = cafe_readl(cafe, NAND_TIMING3);
 
-               if (timing1 | timing2 | timing3) {
-                       cafe_dev_dbg(&cafe->pdev->dev, "Timing registers already set (%08x %08x %08x)\n", timing1, timing2, timing3);
+               if (timing[0] | timing[1] | timing[2]) {
+                       cafe_dev_dbg(&cafe->pdev->dev, "Timing registers already set (%08x %08x %08x)\n",
+                                    timing[0], timing[1], timing[2]);
                } else {
                        dev_warn(&cafe->pdev->dev, "Timing registers unset; using most conservative defaults\n");
-                       timing1 = timing2 = timing3 = 0xffffffff;
+                       timing[0] = timing[1] = timing[2] = 0xffffffff;
                }
        }
 
@@ -609,9 +606,9 @@ static int __devinit cafe_nand_probe(struct pci_dev *pdev,
        cafe_writel(cafe, 1, NAND_RESET);
        cafe_writel(cafe, 0, NAND_RESET);
 
-       cafe_writel(cafe, timing1, NAND_TIMING1);
-       cafe_writel(cafe, timing2, NAND_TIMING2);
-       cafe_writel(cafe, timing3, NAND_TIMING3);
+       cafe_writel(cafe, timing[0], NAND_TIMING1);
+       cafe_writel(cafe, timing[1], NAND_TIMING2);
+       cafe_writel(cafe, timing[2], NAND_TIMING3);
 
        cafe_writel(cafe, 0xffffffff, NAND_IRQ_MASK);
        err = request_irq(pdev->irq, &cafe_nand_interrupt, IRQF_SHARED,