Blackfin arch: Add Workaround for ANOMALY 05000257

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

diff --git a/arch/blackfin/lib/ins.S b/arch/blackfin/lib/ins.S
index 730d2b427538c3adb29fd33a2a746a5a53c20adb..7d5e9846311d717e46d8e082af7845796c9dcb8b 100644 (file)
--- a/arch/blackfin/lib/ins.S
+++ b/arch/blackfin/lib/ins.S
@@ -29,6 +29,7 @@
  */
 
 #include <linux/linkage.h>
+#include <asm/blackfin.h>
 
 .align 2
 
@@ -39,11 +40,14 @@ ENTRY(_insl)
        P2 = R2;        /* P2 = count */
        SSYNC;
        LSETUP( .Llong_loop_s, .Llong_loop_e) LC0 = P2;
-.Llong_loop_s: R0 = [P0];
-.Llong_loop_e: [P1++] = R0;
+.Llong_loop_s:  R0 = [P0];
+               [P1++] = R0;
+               NOP;
+.Llong_loop_e:         NOP;
        sti R3;
        RTS;
 
+
 ENTRY(_insw)
        P0 = R0;        /* P0 = port */
        cli R3;
@@ -51,8 +55,10 @@ ENTRY(_insw)
        P2 = R2;        /* P2 = count */
        SSYNC;
        LSETUP( .Lword_loop_s, .Lword_loop_e) LC0 = P2;
-.Lword_loop_s: R0 = W[P0];
-.Lword_loop_e: W[P1++] = R0;
+.Lword_loop_s:  R0 = W[P0];
+               W[P1++] = R0;
+               NOP;
+.Lword_loop_e:         NOP;
        sti R3;
        RTS;
 
@@ -63,7 +69,9 @@ ENTRY(_insb)
        P2 = R2;        /* P2 = count */
        SSYNC;
        LSETUP( .Lbyte_loop_s, .Lbyte_loop_e) LC0 = P2;
-.Lbyte_loop_s: R0 = B[P0];
-.Lbyte_loop_e: B[P1++] = R0;
+.Lbyte_loop_s:  R0 = B[P0];
+               B[P1++] = R0;
+               NOP;
+.Lbyte_loop_e:  NOP;
        sti R3;
        RTS;

diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S
index 8eb0a9023482b89066c3b20a4b6c7bdd1d6bb3d1..e463733f5c774f1520b6b7f82413d25e827eae7c 100644 (file)
--- a/arch/blackfin/mach-common/entry.S
+++ b/arch/blackfin/mach-common/entry.S
@@ -181,6 +181,12 @@ ENTRY(_ex_single_step)
 
 _return_from_exception:
        DEBUG_START_HWTRACE
+#ifdef ANOMALY_05000257
+       R7=LC0;
+       LC0=R7;
+       R7=LC1;
+       LC1=R7;
+#endif
        (R7:6,P5:4) = [sp++];
        ASTAT = [sp++];
        sp = retn;