sky2: turn off Rx checksum on bad hardware

On Yukon FE, occasional hardware receive checksum errors are seen.
An early indication of the problem is single bit differences in the two
checksum engines.  Use this as a detection mechanism to turn off Rx
checksumming.

Signed-off-by: Stephen Hemminger <shemminger@linux-foundation.org>
Signed-off-by: Jeff Garzik <jeff@garzik.org>

diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c
index 53839979cfb8fb1249dc27161b4cab2649fb994c..ab0ab92583fe427a0568cbb87c5571b918909998 100644 (file)
--- a/drivers/net/sky2.c
+++ b/drivers/net/sky2.c
@@ -2165,9 +2165,27 @@ force_update:
                        /* fall through */
 #endif
                case OP_RXCHKS:
-                       skb = sky2->rx_ring[sky2->rx_next].skb;
-                       skb->ip_summed = CHECKSUM_COMPLETE;
-                       skb->csum = status & 0xffff;
+                       if (!sky2->rx_csum)
+                               break;
+
+                       /* Both checksum counters are programmed to start at
+                        * the same offset, so unless there is a problem they
+                        * should match. This failure is an early indication that
+                        * hardware receive checksumming won't work.
+                        */
+                       if (likely(status >> 16 == (status & 0xffff))) {
+                               skb = sky2->rx_ring[sky2->rx_next].skb;
+                               skb->ip_summed = CHECKSUM_COMPLETE;
+                               skb->csum = status & 0xffff;
+                       } else {
+                               printk(KERN_NOTICE PFX "%s: hardware receive "
+                                      "checksum problem (status = %#x)\n",
+                                      dev->name, status);
+                               sky2->rx_csum = 0;
+                               sky2_write32(sky2->hw,
+                                            Q_ADDR(rxqaddr[le->link], Q_CSR),
+                                            BMU_DIS_RX_CHKSUM);
+                       }
                        break;
 
                case OP_TXINDEXLE: