]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
cy82c693: remove no longer needed CY82C693_DEBUG_LOGS code
authorBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Mon, 13 Oct 2008 19:39:39 +0000 (21:39 +0200)
committerBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Mon, 13 Oct 2008 19:39:39 +0000 (21:39 +0200)
Having CY82C693_DEBUG_INFO is enough nowadays.

Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
drivers/ide/pci/cy82c693.c

index 1e3d60a8700826b83e9d2a803f35e097024d6e2b..5241ef74f8d90e947272b13bd8cc657ea263b34c 100644 (file)
@@ -53,7 +53,6 @@
 /*
  *     The following are used to debug the driver.
  */
-#define CY82C693_DEBUG_LOGS    0
 #define CY82C693_DEBUG_INFO    0
 
 /*
@@ -172,17 +171,6 @@ static void cy82c693_set_dma_mode(ide_drive_t *drive, const u8 mode)
 
        index = hwif->channel ? CY82_INDEX_CHANNEL1 : CY82_INDEX_CHANNEL0;
 
-#if CY82C693_DEBUG_LOGS
-       /* for debug let's show the previous values */
-
-       outb(index, CY82_INDEX_PORT);
-       data = inb(CY82_DATA_PORT);
-
-       printk(KERN_INFO "%s (ch=%d, dev=%d): DMA mode is %d (single=%d)\n",
-               drive->name, HWIF(drive)->channel, drive->select.b.unit,
-               (data&0x3), ((data>>2)&1));
-#endif /* CY82C693_DEBUG_LOGS */
-
        data = (mode & 3) | (single << 2);
 
        outb(index, CY82_INDEX_PORT);
@@ -232,45 +220,6 @@ static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio)
                }
        }
 
-#if CY82C693_DEBUG_LOGS
-       /* for debug let's show the register values */
-
-       if (drive->select.b.unit == 0) {
-               /*
-                * get master drive registers
-                * address setup control register
-                * is 32 bit !!!
-                */
-               pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl);
-               addrCtrl &= 0x0F;
-
-               /* now let's get the remaining registers */
-               pci_read_config_byte(dev, CY82_IDE_MASTER_IOR, &pclk.time_16r);
-               pci_read_config_byte(dev, CY82_IDE_MASTER_IOW, &pclk.time_16w);
-               pci_read_config_byte(dev, CY82_IDE_MASTER_8BIT, &pclk.time_8);
-       } else {
-               /*
-                * set slave drive registers
-                * address setup control register
-                * is 32 bit !!!
-                */
-               pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl);
-
-               addrCtrl &= 0xF0;
-               addrCtrl >>= 4;
-
-               /* now let's get the remaining registers */
-               pci_read_config_byte(dev, CY82_IDE_SLAVE_IOR, &pclk.time_16r);
-               pci_read_config_byte(dev, CY82_IDE_SLAVE_IOW, &pclk.time_16w);
-               pci_read_config_byte(dev, CY82_IDE_SLAVE_8BIT, &pclk.time_8);
-       }
-
-       printk(KERN_INFO "%s (ch=%d, dev=%d): PIO timing is "
-               "(addr=0x%X, ior=0x%X, iow=0x%X, 8bit=0x%X)\n",
-               drive->name, hwif->channel, drive->select.b.unit,
-               addrCtrl, pclk.time_16r, pclk.time_16w, pclk.time_8);
-#endif /* CY82C693_DEBUG_LOGS */
-
        /* let's calc the values for this PIO mode */
        compute_clocks(pio, &pclk);