avr32: pm_standby low-power ram bug fix

The value stored into the SDRAMC LPR register should be the current
value of the register with the Self-refresh value set in the lower bit
field.

The bug involved only the Self-refresh value being written to the
register, thus over writing any low-power ram settings.

Signed-off-by: Humphrey Bucknell <hbucknell@saitek.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>

diff --git a/arch/avr32/mach-at32ap/pm-at32ap700x.S b/arch/avr32/mach-at32ap/pm-at32ap700x.S
index 5be4de65b209661edbaab3851f7283149c96dba0..17503b0ed6c9b3f5865406fb0d5f44241ce6bab7 100644 (file)
--- a/arch/avr32/mach-at32ap/pm-at32ap700x.S
+++ b/arch/avr32/mach-at32ap/pm-at32ap700x.S
@@ -134,7 +134,7 @@ pm_standby:
        mov     r11, SDRAMC_LPR_LPCB_SELF_RFR
        bfins   r10, r11, 0, 2          /* LPCB <- self Refresh */
        sync    0                       /* flush write buffer */
-       st.w    r12[SDRAMC_LPR], r11    /* put SDRAM in self-refresh mode */
+       st.w    r12[SDRAMC_LPR], r10    /* put SDRAM in self-refresh mode */
        ld.w    r11, r12[SDRAMC_LPR]
        unmask_interrupts
        sleep   CPU_SLEEP_FROZEN