add delay around sl82c105_reset_engine calls

The hald media changed polling does really confuse things.
Noone knows why the delays are needed, but they give us access to the CD.

An udelay(50) will give reliable access to the drive, but there is still
one (or more) EH reset. The drive works without EH resets with udelay(100).

Signed-off-by: Olaf Hering <olaf@aepfle.de>
Signed-off-by: Jeff Garzik <jeff@garzik.org>

diff --git a/drivers/ata/pata_sl82c105.c b/drivers/ata/pata_sl82c105.c
index f2fa158d07ca3fc57f9daa7388707d42ab52cf3e..96e890fd645b671247069881385de1c36d0abdb0 100644 (file)
--- a/drivers/ata/pata_sl82c105.c
+++ b/drivers/ata/pata_sl82c105.c
@@ -187,7 +187,9 @@ static void sl82c105_bmdma_start(struct ata_queued_cmd *qc)
 {
        struct ata_port *ap = qc->ap;
 
+       udelay(100);
        sl82c105_reset_engine(ap);
+       udelay(100);
 
        /* Set the clocks for DMA */
        sl82c105_configure_dmamode(ap, qc->dev);
@@ -216,6 +218,7 @@ static void sl82c105_bmdma_stop(struct ata_queued_cmd *qc)
 
        ata_bmdma_stop(qc);
        sl82c105_reset_engine(ap);
+       udelay(100);
 
        /* This will redo the initial setup of the DMA device to matching
           PIO timings */