struct omap_irq_bank {
unsigned long base_reg;
unsigned long trigger_map;
+ unsigned long wake_enable;
};
static unsigned int irq_bank_count = 0;
omap_ack_irq(irq);
}
+static int omap_wake_irq(unsigned int irq, unsigned int enable)
+{
+ int bank = IRQ_BANK(irq);
+
+ if (enable)
+ irq_banks[bank].wake_enable |= IRQ_BIT(irq);
+ else
+ irq_banks[bank].wake_enable &= ~IRQ_BIT(irq);
+
+ return 0;
+}
+
+
/*
* Allows tuning the IRQ type and priority
*
static struct omap_irq_bank omap1610_irq_banks[] = {
{ .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3fefe8f },
{ .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb7c1fd },
- { .base_reg = OMAP_IH2_BASE + 0x100, .trigger_map = 0xfffff7ff },
+ { .base_reg = OMAP_IH2_BASE + 0x100, .trigger_map = 0xffffb7ff },
{ .base_reg = OMAP_IH2_BASE + 0x200, .trigger_map = 0xffffffff },
};
#endif
.ack = omap_mask_ack_irq,
.mask = omap_mask_irq,
.unmask = omap_unmask_irq,
+ .wake = omap_wake_irq,
};
void __init omap_init_irq(void)
/*
- * linux/arch/arm/mach-omap/time.c
+ * linux/arch/arm/mach-omap/omap1/time.c
*
* OMAP Timers
*
* Copyright (C) 2004 Nokia Corporation
- * Partial timer rewrite and additional VST timer support by
+ * Partial timer rewrite and additional dynamic tick timer support by
* Tony Lindgen <tony@atomide.com> and
* Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
*
* MPU timer
* ---------------------------------------------------------------------------
*/
-#define OMAP_MPU_TIMER1_BASE (0xfffec500)
-#define OMAP_MPU_TIMER2_BASE (0xfffec600)
-#define OMAP_MPU_TIMER3_BASE (0xfffec700)
#define OMAP_MPU_TIMER_BASE OMAP_MPU_TIMER1_BASE
#define OMAP_MPU_TIMER_OFFSET 0x100
-#define MPU_TIMER_FREE (1 << 6)
-#define MPU_TIMER_CLOCK_ENABLE (1 << 5)
-#define MPU_TIMER_AR (1 << 1)
-#define MPU_TIMER_ST (1 << 0)
-
/* cycles to nsec conversions taken from arch/i386/kernel/timers/timer_tsc.c,
* converted to use kHz by Kevin Hilman */
/* convert from cycles(64bits) => nanoseconds (64bits)
return IRQ_HANDLED;
}
+#ifdef CONFIG_NO_IDLE_HZ
+/*
+ * Programs the next timer interrupt needed. Called when dynamic tick is
+ * enabled, and to reprogram the ticks to skip from pm_idle.
+ */
+void omap_32k_timer_next_dyn_tick_interrupt(void)
+{
+ unsigned long next;
+
+ if (!system_timer->dyn_tick->state & DYN_TICK_ENABLED)
+ return;
+
+ next = next_timer_interrupt() - jiffies;
+
+ if (next > MAX_SKIP_JIFFIES)
+ next = MAX_SKIP_JIFFIES;
+
+ /*
+ * We can keep the timer continuous, no need to set it to
+ * run in one-shot mode. When using dynamic tick, the timer
+ * will get reprogrammed again after the next interrupt.
+ */
+ omap_32k_timer_start(JIFFIES_TO_HW_TICKS(next, 32768) + 1);
+}
+
+static struct irqaction omap_32k_timer_irq;
+extern struct timer_update_handler timer_update;
+
+static int omap_32k_timer_enable_dyn_tick(void)
+{
+ omap_32k_timer_next_dyn_tick_interrupt();
+ return 0;
+}
+
+static int omap_32k_timer_disable_dyn_tick(void)
+{
+ omap_32k_timer_start(OMAP_32K_TIMER_TICK_PERIOD);
+ return 0;
+}
+
+static struct dyn_tick_timer omap_dyn_tick_timer = {
+ .enable = omap_32k_timer_enable_dyn_tick,
+ .disable = omap_32k_timer_disable_dyn_tick,
+ .reprogram = omap_32k_timer_next_dyn_tick_interrupt,
+ .handler = omap_32k_timer_interrupt,
+};
+#endif /* CONFIG_NO_IDLE_HZ */
+
static struct irqaction omap_32k_timer_irq = {
.name = "32KHz timer",
.flags = SA_INTERRUPT,
static __init void omap_init_32k_timer(void)
{
+
+#ifdef CONFIG_NO_IDLE_HZ
+ omap_timer.dyn_tick = &omap_dyn_tick_timer;
+
+ /* Tell __do_irq not to duplicate timer ticks with dyn-tick */
+ omap_32k_timer_irq.flags |= SA_TIMER;
+#endif
+
setup_irq(INT_OS_TIMER, &omap_32k_timer_irq);
omap_timer.offset = omap_32k_timer_gettimeoffset;
omap_32k_last_tick = omap_32k_sync_timer_read();
* Timer initialization
* ---------------------------------------------------------------------------
*/
-void __init omap_timer_init(void)
+static void __init omap_timer_init(void)
{
#if defined(CONFIG_OMAP_MPU_TIMER)
omap_init_mpu_timer();