#include "memory.h"
#include "sdrc.h"
-#define SMS_SYSCONFIG (OMAP2_SMS_BASE + 0x010)
-
unsigned long omap2_sdrc_base;
+unsigned long omap2_sms_base;
static struct memory_timings mem_timings;
static u32 curr_perf_level = CORE_CLK_SRC_DPLL_X2;
{
u32 l;
- l = omap_readl(SMS_SYSCONFIG);
+ l = sms_read_reg(SMS_SYSCONFIG);
l &= ~(0x3 << 3);
l |= (0x2 << 3);
- omap_writel(l, SMS_SYSCONFIG);
+ sms_write_reg(l, SMS_SYSCONFIG);
l = sdrc_read_reg(SDRC_SYSCONFIG);
l &= ~(0x3 << 3);
l |= (0x2 << 3);
sdrc_write_reg(l, SDRC_SYSCONFIG);
-
}
#include <asm/arch/sdrc.h>
extern unsigned long omap2_sdrc_base;
+extern unsigned long omap2_sms_base;
#define OMAP_SDRC_REGADDR(reg) (void __iomem *)IO_ADDRESS(omap2_sdrc_base + reg)
+#define OMAP_SMS_REGADDR(reg) (void __iomem *)IO_ADDRESS(omap2_sms_base + reg)
+
/* SDRC global register get/set */
return __raw_readl(OMAP_SDRC_REGADDR(reg));
}
+/* SMS global register get/set */
+
+static void __attribute__((unused)) sms_write_reg(u32 val, u16 reg)
+{
+ pr_debug("sms_write_reg: writing 0x%0x to 0x%0x\n", val,
+ (u32)OMAP_SMS_REGADDR(reg));
+
+ __raw_writel(val, OMAP_SMS_REGADDR(reg));
+}
+
+static u32 __attribute__((unused)) sms_read_reg(u16 reg)
+{
+ return __raw_readl(OMAP_SMS_REGADDR(reg));
+}
+
+
#endif
void __init omap2_set_globals_242x(void)
{
omap2_sdrc_base = OMAP2420_SDRC_BASE;
+ omap2_sms_base = OMAP2420_SMS_BASE;
}
#endif
void __init omap2_set_globals_243x(void)
{
omap2_sdrc_base = OMAP243X_SDRC_BASE;
+ omap2_sms_base = OMAP243X_SMS_BASE;
}
#endif
void __init omap2_set_globals_343x(void)
{
omap2_sdrc_base = OMAP343X_SDRC_BASE;
+ omap2_sms_base = OMAP343X_SMS_BASE;
}
#endif
#define OMAP2_PRCM_BASE OMAP2420_PRCM_BASE
#define OMAP2_CM_BASE OMAP2420_CM_BASE
#define OMAP2_PRM_BASE OMAP2420_PRM_BASE
-#define OMAP2_SMS_BASE OMAP2420_SMS_BASE
#define OMAP2_VA_IC_BASE IO_ADDRESS(OMAP24XX_IC_BASE)
#define OMAP2_CTRL_BASE OMAP2420_CTRL_BASE
#define OMAP2_PRCM_BASE OMAP2430_PRCM_BASE
#define OMAP2_CM_BASE OMAP2430_CM_BASE
#define OMAP2_PRM_BASE OMAP2430_PRM_BASE
-#define OMAP2_SMS_BASE OMAP243X_SMS_BASE
#define OMAP2_VA_IC_BASE IO_ADDRESS(OMAP24XX_IC_BASE)
#define OMAP2_CTRL_BASE OMAP243X_CTRL_BASE
#define OMAP343X_SMS_BASE 0x6C000000
#define OMAP343X_SDRC_BASE 0x6D000000
#define OMAP34XX_GPMC_BASE 0x6E000000
-#define OMAP3430_SCM_BASE 0x48002000
-#define OMAP3430_CTRL_BASE OMAP3430_SCM_BASE
+#define OMAP343X_SCM_BASE 0x48002000
+#define OMAP3430_CTRL_BASE OMAP343X_SCM_BASE
#define OMAP34XX_IC_BASE 0x48200000
#define OMAP34XX_IVA_INTC_BASE 0x40000000
#define OMAP2_32KSYNCT_BASE OMAP3430_32KSYNCT_BASE
#define OMAP2_CM_BASE OMAP3430_CM_BASE
#define OMAP2_PRM_BASE OMAP3430_PRM_BASE
-#define OMAP2_SMS_BASE OMAP343X_SMS_BASE
#define OMAP2_VA_IC_BASE IO_ADDRESS(OMAP34XX_IC_BASE)
#define OMAP2_CTRL_BASE OMAP3430_CTRL_BASE
#define OMAP34XX_CONTROL_DEVCONF0 (L4_34XX_BASE + 0x2274)
#define ____ASM_ARCH_SDRC_H
/*
- * OMAP2 SDRC register definitions
+ * OMAP2/3 SDRC/SMS register definitions
*
* Copyright (C) 2007 Texas Instruments, Inc.
* Copyright (C) 2007 Nokia Corporation
#define SDRC_RFR_CTRL_BYPASS (0x00005000 | 1) /* Need to calc */
+/*
+ * SMS register access
+ */
+
+
+#define OMAP242X_SMS_REGADDR(reg) (void __iomem *)IO_ADDRESS(OMAP2420_SMS_BASE + reg)
+#define OMAP243X_SMS_REGADDR(reg) (void __iomem *)IO_ADDRESS(OMAP243X_SMS_BASE + reg)
+#define OMAP343X_SMS_REGADDR(reg) (void __iomem *)IO_ADDRESS(OMAP343X_SMS_BASE + reg)
+
+/* SMS register offsets - read/write with sms_{read,write}_reg() */
+
+#define SMS_SYSCONFIG 0x010
+/* REVISIT: fill in other SMS registers here */
+
#endif