[AGPGART] Fix PCI-posting flush typo.

Unfortunately there was a typo in one of the patches I sent,
(The one now committed to the agpgart tree).
It may cause a bus error on i810 type hardware.

Signed-off-by: Thomas Hellstrom <thomas@tungstengraphics.com>
Signed-off-by: Dave Jones <davej@redhat.com>

diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c
index ccb8018b831f3c952153552453d57e5d1158cb93..ab0a9c0ad7c00e77d07edf2027cc8eb15fe6ca98 100644 (file)
--- a/drivers/char/agp/intel-agp.c
+++ b/drivers/char/agp/intel-agp.c
@@ -253,7 +253,7 @@ insert:
                        mem->memory[i], mem->type),
                        intel_i810_private.registers+I810_PTE_BASE+(j*4));
        }
-       readl(intel_i810_private.registers+I810_PTE_BASE+(j-1*4));      /* PCI Posting. */
+       readl(intel_i810_private.registers+I810_PTE_BASE+((j-1)*4));    /* PCI Posting. */
 
        agp_bridge->driver->tlb_flush(mem);
        return 0;